Polar Code Rate Matching with Unified Bit Deletion Positions

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Solution Overview

Problem

The complexity of rate matching and de-rate matching for polar codes is high due to inconsistent bit deletion positions in puncturing and shortening manners, leading to inefficiencies in bit sequence manipulation.

Innovation Solution

A method that determines a second bit position set based on a first bit position set, allowing for channel encoding and rate matching to unify bit deletion positions, reducing complexity and overheads by using cyclic shift, mirror reversal, or segmented cyclic shift.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If different rate matching manners (puncturing and shortening) are used based on target code rate, then adaptability to different code rates is improved, but complexity of rate matching and de-rate matching increases due to inconsistent bit deletion positions

Engineering Contradiction:
Improveadaptability to different code ratesVSAvoidcomplexity of rate matching and de-rate matching
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing a unified rate matching framework that handles both puncturing and shortening manners through a common bit position set determination mechanism. The communication apparatus determines a second bit position set based on a first bit position set, which serves as an initial position set for bits to be deleted. This unified approach allows the same apparatus and algorithm to handle different rate matching manners without requiring separate complex processing paths, thereby reducing overall system complexity while maintaining adaptability to different code rates.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent employs parameter changes by transforming the bit position representation through cyclic shift, mirror reversal, or segmented cyclic shift operations. Instead of maintaining different deletion position patterns for puncturing and shortening, the system uses a base first bit position set and applies parameter transformations to generate the second bit position set. This allows flexible adaptation to different code rates and rate matching manners by changing the positional parameters rather than restructuring the entire rate matching logic.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If bit deletion positions are determined separately for puncturing and shortening manners, then precision of rate matching for specific code rates is improved, but ease of operation decreases due to need to determine front-end or back-end bits based on different manners

Engineering Contradiction:
Improveprecision of bit deletion positioningVSAvoidease of rate matching operation
Core Design Contradiction:
Manufacturing precisionVSEase of operation

Solution Approach 1:

The patent applies preliminary action by pre-determining the first bit position set as an initial position set for bits to be deleted. This first bit position set serves as a foundation that is then transformed through cyclic shift, mirror reversal, or segmented cyclic shift to generate the second bit position set. By establishing this preliminary bit position framework, the system eliminates the need for separate determination logic for puncturing and shortening manners, thereby improving ease of operation while maintaining precise bit deletion positioning through the transformed second bit position set.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250373476A1Rate matching method, de-rate matching method, and communication apparatus
Publication Date: 2025.12.04 HUAWEI TECH CO LTD
  • US20250373476A1 patent drawing
  • US20250373476A1 patent drawing
  • US20250373476A1 patent drawing

AI summary

The disclosure relates to rate matching methods, de-rate matching methods, and communication apparatuses. An example method includes: determining a second position set based on a first position set, which is an initial position set corresponding to a bit to be deleted during rate matching, and the second position set is a bit position set corresponding to an information bit in a to-be-encoded sequence; and performing rate matching on a first bit sequence to obtain a second bit sequence. The second bit sequence corresponds to a bit position other than a third position set in the first bit sequence, and a bit position in the third position set is obtained when a bit position in the first position set in the first bit sequence is converted in one or more of cyclic shift, mirror reversal, or segmented cyclic shift.