Polar Code Rate Matching with Virtual Buffer and Sub-Block Interleaving

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Solution Overview

Problem

The two-step rate matching algorithm for Polar codes conflicts with the selection of the row or column vector of the coding matrix, leading to performance loss and decoding errors, especially when coded bits are randomly divided into groups without considering priority bit order.

Innovation Solution

The method involves dividing coded bits from a Polar encoder into groups, performing interleaving, bit reduction, and bit repetition based on a virtual IR buffer size, and comparing available transmission channel bits to adjust the output accordingly, ensuring efficient and flexible rate matching while supporting HARQ retransmissions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If coded bits are randomly divided into three groups for two-step rate matching, then rate matching and HARQ retransmission are supported, but row vector selection of coding matrix is compromised and decoding performance deteriorates

Engineering Contradiction:
Improverate matching supportVSAvoiddecoding performance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent divides coded bits into multiple groups (first group, second group, third group) and applies different processing operations to each group. This segmentation allows independent control of systematic bits and parity bits, enabling both rate matching flexibility and preservation of bit priority relationships for improved decoding performance

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different processing operations are applied to different groups of coded bits based on their characteristics. Systematic bits (first group) receive different treatment compared to parity bits (second and third groups), allowing local optimization of each bit group's processing to maintain overall system performance

Inventive Principle:
Principle #3Local quality

2Productivity

If coded bits are divided into groups for rate matching, then transmission rate can be adjusted, but arrangement order and output order of priority bits are not considered leading to performance loss

Engineering Contradiction:
Improvetransmission rateVSAvoidperformance gain
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The patent performs preliminary classification of coded bits into systematic bits and parity bits before rate matching operations. This preliminary action ensures that priority bits are identified and protected throughout subsequent processing steps, preventing performance loss while enabling flexible rate adjustment

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If independent puncturing or repetition operation is performed on each group, then coded bit length can be matched to buffer and transmission resource, but row vector selection cannot be performed optimally

Engineering Contradiction:
Improvebit length matchingVSAvoidrow vector selection accuracy
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent implements dynamic processing where different operations (puncturing, repetition, or no operation) are selectively applied to different bit groups based on transmission requirements. This dynamic approach allows optimal row vector selection to be maintained while achieving flexible bit length matching to transmission resources

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP3799314B1Rate matching with sub-block interleaving and a virtual buffer for polar codes
Publication Date: 2023.07.26 HUAWEI TECH CO LTD
  • EP3799314B1 patent drawingFigure 1
  • EP3799314B1 patent drawingFigure 2
  • EP3799314B1 patent drawingFigure 3

AI summary

A rate matching processing method and apparatus for coding are disclosed. The method includes dividing coded bits output by a Polar encoder into M groups (101), and performing interleaving processing on coded bits in the 1st group to the M th group separately (101), where M is a positive integer; performing bit reduction processing (102) on coded bits in multiple groups of the M groups according to a size of a virtual IR buffer module and outputting (102) the coded bits after bit reduction processing to the virtual IR buffer module; comparing a quantity of available bits of a transmission channel with a quantity of coded bits (103), in multiple groups, stored in the virtual IR buffer module, and performing, according to a comparison result, repetition or reduction processing on the coded bits (103), in the multiple groups, stored in the virtual IR buffer module; and performing tandem processing (104) on coded bits on which the repetition or reduction processing is performed, to generate one bit stream, and sending the bit stream through the transmission channel (104).