Polar Code SCF Decoding with Fractal Subtotal Matrix Generation

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Solution Overview

Problem

The successive cancellation flip (SCF) decoding method for polar codes, while improving error correction performance, significantly increases memory usage and power consumption due to the need to store information at multiple positions during the decoding process.

Innovation Solution

The proposed solution involves an apparatus and method for SCF decoding that generates an iterative unit subtotal matrix and an auxiliary matrix using selection logic, reducing memory requirements by utilizing a fractal structure and AND gate operations, thereby reducing the size of the matrix generator and enhancing throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If SCF decoding is implemented by hardware to improve error correction performance, then error correction capability is improved, but memory usage increases greatly

Engineering Contradiction:
Improveerror correction performanceVSAvoidmemory usage
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent divides the decoding process into multiple stages: primary SC decoding, CRC error detection, and conditional SCF re-decoding. The SCF operation is segmented to only execute when CRC detects an error, avoiding unnecessary memory operations during successful decoding scenarios.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different processing quality to different data paths: successful decodings use the standard SC path with minimal memory access, while failed decodings (detected by CRC) trigger the enhanced SCF path with additional bit-flipping operations and memory access at specific positions.

Inventive Principle:
Principle #3Local quality

2Reliability

If SCF decoding stores information at previous bit positions for re-decoding, then error correction performance is improved, but power consumption increases

Engineering Contradiction:
Improveerror correction performanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action through the iterative SCF process: after primary decoding and CRC check, the system periodically attempts bit-flipping at positions indicated by the auxiliary matrix when errors are detected, continuing this periodic re-decoding process until either success or maximum iterations are reached.

Inventive Principle:
Principle #19Periodic action

3Quantity of substance

If auxiliary matrix is generated using selection logic with AND gate operations, then memory requirements are reduced, but device complexity increases

Engineering Contradiction:
Improvememory requirementsVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent extracts only the necessary information from the codeword for auxiliary matrix generation. The selection logic extracts specific bit positions from the received signal based on the auxiliary matrix pattern, storing only these extracted values rather than the entire codeword, thereby reducing memory requirements.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces complex memory storage and retrieval mechanisms with logical operations. Instead of storing and accessing large amounts of data from memory, the system uses AND gate operations and selection logic to compute the auxiliary matrix values directly from the input signal, substituting mechanical memory access with logical computation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS11764901B2Apparatus and method for successive cancellation flip decoding of polar code
Publication Date: 2023.09.19 AJOU UNIV IND ACADEMIC COOP FOUND
  • US11764901B2 patent drawing
  • US11764901B2 patent drawing
  • US11764901B2 patent drawing

AI summary

Disclosed are an apparatus and method for successive cancellation flip decoding of a polar code. The apparatus for successive cancellation flip decoding of a polar code according to an embodiment includes an iterative unit subtotal matrix generator configured to generate an iterative unit subtotal matrix corresponding to a preset iterative unit size based on a portion of an entire subtotal matrix, a selection logic configured to determine one or more selection bits based on a bit string representing a position of a bit returned when re-decoding and generate an auxiliary matrix for generating the entire subtotal matrix from the one or more selection bits, and an entire subtotal matrix generator configured to generate the entire subtotal matrix by using the iterative unit subtotal matrix and the auxiliary matrix.