Polarity Write Operations for Memory Cell Energy Reduction
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Solution Overview
Problem
Current memory systems face inefficiencies in writing operations due to the high magnitude of programming pulses required, which can stress memory cells and increase energy consumption, especially when transitioning between different logic states.
Innovation Solution
The implementation of a 'polarity write' operation that selects the pre-read voltage based on the incoming data bit, reducing the average magnitude of transitions and conserving energy by matching the polarity of the pre-read voltage to the programming voltage, thereby skipping unnecessary programming operations when the state of the memory cell matches the intended state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high magnitude programming pulses are used to write data to memory cells, then the write operation is reliable and fast, but energy consumption increases and memory cell stress increases
Solution Approach 1:
The patent applies preliminary action by performing a pre-read operation before the write operation. The pre-read detects the current state of the memory cell, allowing the system to determine in advance whether a programming pulse is needed. This preliminary detection enables the system to skip unnecessary high-magnitude programming pulses, thereby reducing energy consumption while maintaining write reliability when actually needed.
Solution Approach 2:
The patent changes the parameter of voltage magnitude dynamically. Instead of always applying high-magnitude programming pulses, the system adjusts the voltage magnitude based on the detected current state. When the current state matches the target state, zero or low-magnitude voltage is applied; when different, high-magnitude programming pulses are applied. This parameter change resolves the contradiction by making energy consumption dependent on actual need.
2Reliability
If high magnitude programming pulses are applied frequently, then data can be written reliably, but memory cell wear increases
Solution Approach 1:
The pre-read operation serves as a preliminary action that detects whether the memory cell state needs changing before applying programming pulses. By checking the current state first, the system avoids unnecessary programming operations that would contribute to memory cell wear, thereby extending memory cell lifespan while maintaining reliable data writing when actually required.
Solution Approach 2:
The patent converts the potential harm of unnecessary programming pulses into a benefit by using the pre-read mechanism. The pre-read detects when programming is not needed, and the system deliberately skips the programming pulse application. This converts what would have been harmful repeated stress into beneficial stress reduction, extending memory cell life while preserving write reliability.
3Device complexity
If pre-read voltage polarity is fixed, then the control logic is simple, but energy consumption increases due to unnecessary polarity transitions
Solution Approach 1:
The patent applies dynamics by making the pre-read voltage polarity variable rather than fixed. The polarity is dynamically adjusted based on the target data bit value: one polarity for logic 0 and the opposite polarity for logic 1. This dynamic adaptation allows the pre-read voltage to match the intended programming direction, reducing energy consumption from unnecessary polarity transitions while keeping control logic relatively simple through data-driven polarity selection.
Solution Approach 2:
The patent changes the parameter of voltage polarity based on the incoming data bit. Instead of using a fixed polarity, the system selects the polarity that matches the target state. This parameter change optimizes energy consumption by ensuring the pre-read voltage polarity aligns with the intended programming direction, reducing the energy required for state transitions.
Data Source
AI summary
Methods, systems, and devices for data-based polarity write operations are described. A write command may cause a set of data to be written to a set of memory cells. To write the set of data, a write operation that applies voltages across the memory cells based on a logic state of data to be written to the memory cells may be used. During a first interval of the write operation, a voltage may be applied across a memory cell based on a logic state of a data bit to be written to the memory cell. During a second interval of the write operation, a voltage may be applied across the memory cell based on an amount of charge conducted by the memory cell during the first interval.