Multi-Zone Polishing Pad Temperature Control for Wafer Planarity
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Solution Overview
Problem
The challenge in semiconductor manufacturing is achieving uniform polishing of semiconductor wafers due to varying materials, structures, and feature densities, which complicates the control of chemical mechanical polishing (CMP) processes.
Innovation Solution
A polishing apparatus and method that adjust the temperature distribution of the polishing pad based on the thickness profile of the wafer, using a multi-zone temperature control system to ensure uniformity and planarity of the polished surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional CMP process is used, then material removal is achieved, but uniform polishing is difficult to achieve due to varying materials and structures
Solution Approach 1:
The patent applies local quality by dividing the polishing pad into multiple temperature zones (e.g., first, second, third regions) with independently controllable temperatures. Each zone can be adjusted to provide optimal polishing conditions for different areas of the wafer, addressing the non-uniform material removal caused by varying materials and structures across the wafer surface.
Solution Approach 2:
The patent implements parameter changes by dynamically adjusting the temperature distribution across different regions of the polishing pad during the CMP process. By varying temperature parameters in different zones, the system optimizes polishing uniformity for wafers with varying materials, structures, and feature densities, resolving the contradiction between achieving uniform polishing and maintaining simple process control.
2Manufacturing precision
If single temperature polishing is used, then process simplicity is maintained, but polishing uniformity across different wafer regions cannot be controlled
Solution Approach 1:
The polishing pad temperature control system is segmented into multiple independent zones (first region, second region, third region), each with its own temperature control capability. This segmentation allows different portions of the wafer to be polished at different temperatures, enabling precise control over surface planarity and polishing uniformity across the entire wafer surface.
Solution Approach 2:
The patent implements dynamic temperature control where the temperature distribution across the polishing pad can be adjusted in real-time during the polishing process. This dynamic adjustment capability allows the system to adapt to different wafer configurations and achieve optimal polishing uniformity, resolving the trade-off between polishing precision and system complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for independent control of polishing temperatures across different regions of the wafer, resulting in a uniform and planar polished surface, enhancing the efficiency and accuracy of semiconductor structure formation.
Implementation Method 1
The platen includes a first heating element, a second heating element and a control unit. The first heating element is disposed in a first region of the platen. The second heating element is disposed in a second region of the platen
Implementation Method 2
grinding the substrate against the polishing pad
Data Source
AI summary
An apparatus and a method forming a semiconductor structure are provided. The method includes receiving a substrate; mounting the substrate to a polishing head with a side of the substrate facing a polishing pad, the polishing pad comprising a first region and a second region; grinding the substrate against the polishing pad; and adjusting a temperature of the first region and a temperature of the second region.