Multi-Step Polishing for Semiconductor Substrate Thinning
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Solution Overview
Problem
Conventional backside illumination processes for image sensors suffer from dishing in trench open areas and ineffective particle removal during substrate thinning, leading to performance deterioration in CMOS image sensors.
Innovation Solution
A multi-step polishing method is employed, featuring a main polishing step with a silicon-to-oxide selectivity of 1:1 or less and an auxiliary polishing step with a selectivity of 10:7 or less, using different polishing agents and pads under varying pressures to uniformly polish oxide and silicon areas without residues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single CMP process is used for substrate thinning, then the process is simple and fast, but dishing occurs in trench open areas and particles are not effectively removed
Solution Approach 1:
The single CMP process is segmented into multiple polishing steps with different selectivities. The first polishing step uses a first polishing agent with a first silicon-to-oxide selectivity, and the second polishing step uses a second polishing agent with a second silicon-to-oxide selectivity different from the first. This segmentation allows each step to address specific issues: the first step removes material efficiently while the second step corrects dishing and removes particles, thereby resolving the contradiction between productivity and manufacturing precision.
2Manufacturing precision
If high silicon-to-oxide selectivity polishing is used, then oxide areas are protected from over-polishing, but silicon areas are not polished uniformly and particles remain
Solution Approach 1:
The polishing process is structured as periodic action with two distinct phases. The first polishing step applies a polishing agent with one silicon-to-oxide selectivity ratio to protect oxide areas, followed by a second polishing step with a different selectivity ratio to uniformly polish silicon areas and remove particles. This periodic alternation between protective polishing and uniform polishing phases ensures both oxide protection and silicon uniformity, resolving the contradiction between manufacturing precision and reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively removes particles and achieves uniform polishing, improving device performance by reducing substrate thickness and enhancing light sensitivity and image quality.
Implementation Method 1
the backside of the substrate is typically thinned by a single chemical mechanical polishing (CMP) process
Implementation Method 2
a silicon-to-oxide selectivity of the main polishing step is different from a silicon-to-oxide selectivity of the auxiliary step
Data Source
AI summary
A polishing method of a semiconductor device is disclosed. A substrate having a first side and a second side opposite to the first side is provided. The substrate has a device layer formed on the first side and a plurality of trench isolation structures therein extending from the first side to the second side. A main polishing step is performed to the second side of the substrate until a surface of at least one of the trench isolation structures is exposed. An auxiliary polishing step is then performed to the second side of the substrate. Besides, a silicon-to-oxide selectivity of the main polishing step is different from a silicon-to-oxide selectivity of the auxiliary step.