Poly Fuse EPROM Sense Amplifier for Low-Power Fast Readout
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Solution Overview
Problem
Electrically-programmable memory cells consume valuable space on IC dies and contribute to reliability issues due to their size and power consumption.
Innovation Solution
The integration of a sense amplifier with cross-coupled inverters, a fuse connected between a positive voltage rail and the first inverter's power terminal, and a reference resistor connected between the positive voltage rail and the second inverter's power terminal, which reduces static current and provides a short read time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If electrically-programmable memory cells are used for trimming analog circuits, then manufacturing variation can be compensated, but valuable IC die space is consumed and reliability issues arise
Solution Approach 1:
The patent combines the memory cell functionality with a sense amplifier into a single integrated structure. The sense amplifier is formed directly over the memory cell, sharing the same substrate and utilizing the memory cell's output directly. This merging eliminates the need for separate memory cell and sense amplifier structures, thereby reducing the total area occupied while maintaining both memory storage and signal amplification functions.
Solution Approach 2:
The integrated structure serves multiple functions: the memory cell provides data storage and trimming capability, while the sense amplifier provides signal amplification and readout. This multi-functional integration allows a single structure to replace what would traditionally require separate components, reducing overall IC die space while improving reliability through reduced interconnect complexity.
2Reliability
If electrically-programmable memory cells are used for trimming analog circuits, then manufacturing variation can be compensated, but power consumption increases
Solution Approach 1:
By merging the memory cell and sense amplifier into a single integrated structure, the patent reduces the total power consumption. The sense amplifier is positioned to directly utilize the memory cell's output without requiring additional buffering or intermediate amplification stages, thereby minimizing the active components that consume power while maintaining the ability to compensate for manufacturing variation.
3Reliability
If traditional memory cell structures are used, then manufacturing variation can be trimmed, but read time is extended
Solution Approach 1:
The integrated memory cell and sense amplifier structure reduces read time by eliminating the delay associated with signal transfer between separate memory cell and sense amplifier structures. The sense amplifier is positioned to directly sense the memory cell output, creating a shorter signal path and reducing the overall read operation time while maintaining the trimming capability for manufacturing variation compensation.
Data Source
AI summary
One example includes an integrated circuit with a sense amplifier that includes a first inverter having a first positive power terminal, a first input and a first output; and a second inverter having a second positive power terminal, a second input connected to the first output and a second output connected to the first input. The integrated circuit also includes a reference resistor connected between a positive voltage rail and the second positive power terminal. A fuse is connected between the positive voltage rail and the first positive power terminal.