Polysilicon Resistor and CMOS Gate Annealing for ZTCR Fabrication
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Solution Overview
Problem
Existing IC fabrication processes for polysilicon resistors and transistors often require additional steps, increasing complexity and cost, particularly for achieving zero temperature-coefficient of resistance (ZTCR), and these steps can have countereffects on other device performance.
Innovation Solution
A method involving the formation of a resistor body and transistor gate, followed by sidewall spacers, a silicide blocking structure, and concurrent millisecond annealing, which reduces the need for separate ZTCR masking and implanting steps while improving dopant activation and resistance performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If additional steps (patterning, implanting, resist removal) are added to achieve ZTCR resistor performance, then the temperature coefficient of resistance is improved (reduced to near zero), but the manufacturing complexity and cost increase
Solution Approach 1:
The patent merges the ZTCR resistor formation process with the standard CMOS transistor fabrication process. The same polysilicon layer, doping steps, and annealing processes are used for both devices, eliminating the need for separate ZTCR-specific patterning, implanting, and resist removal steps. This integration achieves ZTCR performance without increasing manufacturing complexity.
Solution Approach 2:
The patent creates a universal fabrication process that serves multiple functions: forming both standard resistors and ZTCR resistors, as well as creating transistors, using the same process steps. The polysilicon resistor body serves dual purposes as both the resistor element and as a structure that can achieve ZTCR performance through the shared doping and annealing processes.
2Manufacturing precision
If additional steps are added to achieve ZTCR performance, then the resistance stability over temperature is improved, but the manufacturing cost increases
Solution Approach 1:
The patent combines ZTCR resistor formation with standard resistor and transistor fabrication into a single integrated process flow. By using the same polysilicon layer, doping steps, and annealing conditions for all devices, the patent eliminates additional manufacturing steps and associated costs while achieving the desired resistance stability.
Solution Approach 2:
The process allows the polysilicon resistor structure to self-adjust its electrical properties through the standard annealing process. The annealing step simultaneously activates dopants and creates the desired resistance characteristics, with the structure itself achieving ZTCR performance through the thermal processing rather than requiring additional corrective steps.
3Reliability
If device-specific steps are added for one device type, then that device's performance is improved, but the overall manufacturing efficiency decreases
Solution Approach 1:
The patent develops a universal process that forms transistors, standard resistors, and ZTCR resistors using the same fabrication steps. The polysilicon layer serves multiple functions as gate material for transistors and resistor material for both standard and ZTCR resistors, all processed identically through doping and annealing, maximizing manufacturing efficiency while ensuring device performance.
Solution Approach 2:
The patent merges previously separate fabrication workflows into a single unified process. The doping and annealing steps that were previously dedicated to ZTCR resistor formation are now combined with standard transistor and resistor fabrication, allowing all devices to be manufactured simultaneously in the same process batch, thereby improving overall productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables efficient and cost-effective fabrication of polysilicon resistors with favorable temperature coefficients of resistance, allowing for ZTCR performance without additional masks or implants, and provides flexibility in dopant type selection based on resistor size.
Implementation Method 1
forming a silicide blocking structure over at least a portion of the resistor body
Implementation Method 2
concurrently millisecond annealing the resistor body and the transistor gate
Data Source
AI summary
A method of forming an integrated circuit includes first forming a resistor body and a transistor gate from a semiconductor layer over a substrate. Second, sidewall spacers are formed adjacent the resistor body and the transistor gate. Third, a silicide blocking structure is formed over at least a portion of the resistor body. And fourth, the resistor body and the transistor gate are concurrently millisecond annealed.