Polycrystalline Semiconductor Resistor Layout for STI Dishing Prevention

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Solution Overview

Problem

The existing semiconductor fabrication processes face challenges in forming polycrystalline semiconductor resistors on substrates due to issues like 'dishing' in shallow trench isolation (STI) regions, which lead to electrical current leakage and require additional dummy diffusion, increasing the layout area and compromising model accuracy.

Innovation Solution

A method involving the formation of shallow-trench isolation field oxide and dummy diffusion regions on a semiconductor substrate, with polycrystalline semiconductor resistor arms placed over both, allowing for reduced area usage and accurate resistor formation by optimizing the spacing and layout of these components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dummy diffusion is added within the footprint of resistors to meet diffusion density design rules, then diffusion density requirements are satisfied, but the layout area increases significantly

Engineering Contradiction:

Improvediffusion density complianceVSAvoidlayout area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the dummy diffusion regions with the resistor structure by forming resistor arms that extend over both STI regions and dummy diffusion regions. This integration allows the dummy diffusion to serve dual purposes: maintaining diffusion density compliance while simultaneously forming part of the functional resistor structure, thereby eliminating the need for separate dummy diffusion areas and reducing overall layout area.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The resistor arms are designed to serve multiple functions: they provide the functional resistor element while also serving as the dummy diffusion structure needed to meet design rules. This multi-functionality allows the same structural element to satisfy both electrical resistance requirements and diffusion density compliance, optimizing space utilization.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Manufacturing precision

If CMP polishing is used to planarize the substrate, then surface flatness is improved, but dishing occurs in large-area STI regions

Engineering Contradiction:

Improvesurface flatnessVSAvoidSTI region planarity

Core Design Contradiction:

Manufacturing precisionVSShape

Solution Approach 1:

The patent segments the STI regions into smaller discrete areas rather than having large continuous STI regions. By spacing STI regions apart and limiting their individual sizes, the polishing pressure is distributed more evenly, preventing the excessive removal of dielectric material from the center of large STI regions that causes dishing.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent applies different structural configurations to different regions of the substrate. STI regions are strategically placed and sized according to local requirements, with dummy diffusion regions positioned to provide local support and maintain planarity in areas where STI regions are present, thereby preventing dishing while maintaining overall surface flatness.

Inventive Principle:

Principle #3Local quality

3Area of stationary object

If resistor arms are placed close to neighboring diffusion to reduce area, then layout area is reduced, but model accuracy is compromised

Engineering Contradiction:

Improvelayout areaVSAvoidresistor model accuracy

Core Design Contradiction:

Area of stationary objectVSMeasurement precision

Solution Approach 1:

The patent performs preliminary planning in the resistor arm design to pre-establish optimal spacing and positioning. By carefully designing the resistor arm geometry and positioning them over STI and dummy diffusion regions from the outset, the structure achieves both compact area utilization and sufficient distance from neighboring diffusions to maintain model accuracy, avoiding the need for later adjustments.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS10068779B2Systems and methods for fabricating a polycrystaline semiconductor resistor on a semiconductor substrate

Publication Date: 2018.09.04 CIRRUS LOGIC INC

AI summary

In accordance with embodiments of the present disclosure, an integrated circuit may include at least one region of shallow-trench isolation field oxide, at least one region of dummy diffusion, and a polycrystalline semiconductor resistor. The at least one region of shallow-trench isolation field oxide may be formed on a semiconductor substrate. The at least one region of dummy diffusion may be formed adjacent to the at least one region of shallow-trench isolation field oxide on the semiconductor substrate. The polycrystalline semiconductor resistor may comprise at least one resistor arm formed with a polycrystalline semiconductor material, wherein the at least one resistor arm is formed over each of the at least one region of shallow-trench isolation field oxide and the at least one region of dummy diffusion.