Polycrystalline Resistor Doping Layout for Stress-Stable Resistance

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Solution Overview

Problem

Polycrystalline semiconductor resistors in semiconductor dies experience shifts in temperature coefficient due to package-induced stress, affecting the operation of analog circuits where precision is critical.

Innovation Solution

Incorporating a polycrystalline resistor structure with regions of different net conductivity dopant types, where N-type and P-type regions have opposite piezo-resistance coefficients, to counterbalance the changes in resistivity caused by stress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional polycrystalline semiconductor resistor structure is used, then the manufacturing process is simple, but the temperature coefficient shifts due to package-induced stress affecting analog circuit precision

Engineering Contradiction:
Improveresistance stabilityVSAvoidresistor structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The polycrystalline semiconductor resistor is divided into multiple regions with different net conductivity dopant concentrations (e.g., N-type and P-type regions). Each region has opposite piezo-resistance coefficients, allowing them to counterbalance each other's response to stress, thereby reducing overall resistivity variation while maintaining a manageable structure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions within the resistor structure are doped with different conductivity types and concentrations tailored to their specific locations. This local differentiation creates regions with opposite stress responses, where N-type regions compensate for P-type regions under package-induced stress, improving overall resistance stability without requiring complete structural redesign

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If regions with different net conductivity dopant concentrations are incorporated, then resistivity variation due to stress is reduced, but the manufacturing process becomes more complex

Engineering Contradiction:
Improveresistivity control precisionVSAvoidfabrication process simplicity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The different conductivity type dopant regions are formed during the initial polycrystalline semiconductor layer formation process, before the resistor structure is fully assembled. This preliminary doping allows precise control over the distribution of N-type and P-type regions, ensuring they will counterbalance stress effects while being integrated into the standard manufacturing flow

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The net conductivity dopant concentration is varied across different regions of the polycrystalline semiconductor layer to create N-type and P-type regions with opposite piezo-resistance coefficients. By controlling dopant concentration parameters during fabrication, the structure achieves reduced resistivity variation under stress while using existing doping capabilities in the manufacturing process

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design reduces the variation in resistivity due to package-induced stress, leading to improved circuit performance, especially in analog circuits by maintaining resistance stability across varying stress conditions.

Implementation Method 1

N-type and P-type regions have opposite piezo-resistance coefficients, to counterbalance the changes in resistivity caused by stress

Methodology Applied
Scientific EffectPiezo-resistance effect: Piezoresistive Effect

Data Source

PatentUS12328883B2Polycrystalline semiconductor resistor
Publication Date: 2025.06.10 NXP USA INC
  • US12328883B2 patent drawing
  • US12328883B2 patent drawing
  • US12328883B2 patent drawing

AI summary

In one embodiment, a semiconductor die includes a polycrystalline semiconductor resistor structure (poly resistor structure). The poly resistor structure includes a resistive path between a first terminal and a second terminal. The poly resistor structure includes a first region having a net first conductivity type dopant concentration located in the resistance path and a second region having a net second conductivity type dopant concentration located in the resistance path. A silicide structure is located on both a first portion of the first region and a first portion of the second region to electrically connect the first portion of the first region and the first portion of the second region. In some embodiments, poly resistor structures with different conductivity type regions can be connected together.