Polycrystalline Semiconductor Transistor Gate Segmentation

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Solution Overview

Problem

The diffusion of conductivity-enhancing dopants from source/drain regions into polycrystalline channel material in transistors leads to non-uniform threshold voltages across a population of transistor devices, making them unsuitable for tightly regulated operations, such as memory arrays, due to the dopant's migration along grain boundaries.

Innovation Solution

Incorporating a neutral-type conductivity-enhancing dopant in the source/drain regions relative to the polycrystalline semiconductor material, which does not alter the charge carrier proportion in the channel material, and ensuring the transistor gate does not overlap the source/drain regions to minimize off-state leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conductivity-enhancing dopant is incorporated in source/drain regions, then electrical conductivity is improved, but dopant diffuses into polycrystalline channel material along grain boundaries causing non-uniform threshold voltages

Engineering Contradiction:
Improvethreshold voltage uniformityVSAvoidoff-state leakage
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

A lightly-doped extension region is introduced as an intermediary between the heavily-doped source/drain regions and the intrinsic channel material. This intermediate region acts as a buffer that prevents direct diffusion of dopants into the channel while maintaining electrical connectivity, thereby preserving threshold voltage uniformity and reducing off-state leakage.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The source/drain structure is segmented into multiple regions with different doping concentrations: a heavily-doped contact region for electrical connection, a lightly-doped extension region to prevent dopant diffusion, and a spatial separation from the intrinsic channel. This segmentation allows each region to perform its specific function without interfering with others.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If transistor gate overlaps source/drain regions, then gate control is improved, but off-state leakage increases due to dopant diffusion and electric field effects

Engineering Contradiction:
Improvegate controlVSAvoidoff-state leakage
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The gate structure is segmented to create a spatial separation between the gate and the heavily-doped source/drain regions. The gate overlaps only with the lightly-doped extension regions and the intrinsic channel, avoiding direct overlap with high-concentration dopant regions. This segmentation maintains gate control over the channel while preventing unwanted interactions with doped regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions under the gate have different doping qualities: the gate overlaps with lightly-doped or intrinsic regions in the channel area, while heavily-doped source/drain regions are positioned at the edges or separated from the gate. This local differentiation ensures good gate control where needed while minimizing leakage paths where dopants are present.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach maintains uniform electrical properties across a population of transistors, enhancing device performance and suitability for memory arrays by preventing dopant-induced threshold voltage variations and reducing off-state leakage.

Implementation Method 1

Incorporating a neutral-type conductivity-enhancing dopant in the source/drain regions relative to the polycrystalline semiconductor material, which does not alter the charge carrier proportion in the channel material

Methodology Applied
Scientific EffectDoping: Dopants

Implementation Method 2

An electrical gate is adjacent to a region of the polycrystalline first semiconductor material and is configured to induce an electric field within the region of the polycrystalline first semiconductor material

Methodology Applied
Scientific EffectElectric field induction: Electric Field

Implementation Method 3

The diffusion of conductivity-enhancing dopants from source/drain regions into polycrystalline channel material in transistors leads to non-uniform threshold voltages across a population of transistor devices, making them unsuitable for tightly regulated operations, such as memory arrays, due to the dopant's migration along grain boundaries

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS11527620B2Integrated assemblies having polycrystalline first semiconductor material adjacent conductively-doped second semiconductor material
Publication Date: 2022.12.13 MICRON TECHNOLOGY INC
  • US11527620B2 patent drawing
  • US11527620B2 patent drawing
  • US11527620B2 patent drawing

AI summary

Some embodiments include an integrated assembly having a polycrystalline first semiconductor material, and having a second semiconductor material directly adjacent to the polycrystalline first semiconductor material. The second semiconductor material is of a different composition than the polycrystalline first semiconductor material. A conductivity-enhancing dopant is within the second semiconductor material. The conductivity-enhancing dopant is a neutral-type dopant relative to the polycrystalline first semiconductor material. An electrical gate is adjacent to a region of the polycrystalline first semiconductor material and is configured to induce an electric field within said region of the polycrystalline first semiconductor material. The gate is not adjacent to the second semiconductor material.