Poly-Si Hardmask Segmentation for Selective Epitaxial Growth

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Solution Overview

Problem

Current semiconductor fabrication methods face challenges in selectively growing epitaxial layers on source/drain areas due to the limitations of hardmask materials, particularly the inability to use poly-Si hardmasks, which require removal before epitaxial growth and cause field oxide loss or complexity in processing.

Innovation Solution

A method involving a poly-Si or poly-SiGe hardmask etchable with the same chemistry as the S/D material, allowing selective epitaxial growth by etching the hardmask selectively to expose the substrate areas, with end-point triggering for precise control and reduced strain on the gate oxide layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a poly-Si hardmask is used, then etching selectivity towards nitride and oxide is improved, but the hardmask must be removed before epitaxial growth which causes field oxide loss

Engineering Contradiction:
Improveetching selectivityVSAvoidfield oxide loss
Core Design Contradiction:
Manufacturing precisionVSLoss of substance

Solution Approach 1:

The patent segments the hardmask into two distinct layers: a poly-Si top layer (50-200 nm thick) that provides etching selectivity, and a bottom layer (SiO2, Si3N4, or SiGe) that remains during epitaxial growth to protect the field oxide. This segmentation allows each layer to fulfill its specific function without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extracts only the necessary function of the poly-Si hardmask (etching selectivity) into a separate top layer, while leaving the protective function for the field oxide to a different bottom layer material that is resistant to epitaxial growth.

Inventive Principle:
Principle #2Taking out (Extraction)

2Ease of operation

If the hardmask is removed before epitaxial growth, then selective epitaxial growth is enabled, but control of etch rate and field oxide protection is compromised

Engineering Contradiction:
Improveselective epitaxial growthVSAvoidetch rate control
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent performs preliminary action by depositing the bottom layer (SiO2, Si3N4, or SiGe) before the poly-Si top layer. This bottom layer is specifically designed to remain intact during epitaxial growth, providing pre-established protection for the field oxide area while allowing the poly-Si top layer to be selectively removed where needed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the material parameters of the hardmask structure by using different materials for the top and bottom layers with distinct etching and epitaxial growth properties. The bottom layer materials (SiO2, Si3N4, SiGe) have different etch rates and epitaxial growth resistance compared to the poly-Si top layer, enabling precise control of the etching process and protection during subsequent steps.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If Si oxide is used as hardmask, then gate oxide protection is improved, but field oxide loss increases due to double removal

Engineering Contradiction:
Improvegate oxide protectionVSAvoidfield oxide loss
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The patent segments the hardmask functionality into two layers: the poly-Si top layer for etching selectivity and gate oxide protection, and a bottom layer (SiO2, Si3N4, or SiGe) that remains during epitaxial growth to protect the field oxide. This eliminates the need for double removal of field oxide while maintaining gate oxide protection.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The bottom layer acts as an intermediary between the poly-Si top layer and the substrate. It provides the necessary protection for the field oxide during epitaxial growth while allowing the poly-Si top layer to perform its etching function. The intermediary layer mediates between the conflicting requirements of gate oxide protection and field oxide preservation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables precise control of etch rates and reduced field oxide consumption, allowing for gentle opening of the hardmask on the first area and selective epitaxial growth without damaging the gate oxide, thereby simplifying the process and improving etch depth control.

Implementation Method 1

applying at least a poly-Si top layer on the substrate, the top layer being etchable with a given etch chemistry, removing the poly-Si top layer from the first area of the substrate selectively towards the poly-Si top layer in the second substrate area

Methodology Applied
Scientific EffectSelective etching:

Implementation Method 2

performing a selective epitaxial growth of S/D areas in the first substrate area

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS7799664B2Method for selective epitaxial growth of source/drain areas
Publication Date: 2010.09.21 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • US7799664B2 patent drawing
  • US7799664B2 patent drawing
  • US7799664B2 patent drawing

AI summary

One inventive aspect relates to a method of selective epitaxial growth of source/drain (S/D) areas. The method includes providing a substrate having a first and a second substrate area, the first area including at least one gate stack. The method includes applying a poly-Si or poly-SiGe top layer on the substrate, the top layer being etchable with the same etch chemistry as the substrate. The method includes removing the poly-Si or poly-SiGe top layer from the first area selectively towards the poly-Si or poly-SiGe top layer in the second area. The method includes removing simultaneously the poly-Si or poly-SiGe top layer on the second area and at least a part of the substrate in the S/D areas of the first area selectively to the gate stack. The method includes performing a selective epitaxial growth of S/D areas in the first area.