Poly-Si LCD Fabrication Reducing Mask Processes
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Solution Overview
Problem
The existing methods for fabricating liquid crystal display (LCD) devices require a large number of mask processes, leading to increased time and cost due to the complexity of forming driving circuits using poly-crystalline silicon.
Innovation Solution
A method is introduced that reduces the number of mask processes by forming first, second, and third active patterns on a substrate with a pixel region and a driving region, using a gate insulator, and doping source and drain regions with specific impurity ions through contact holes, thereby simplifying the fabrication process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If poly-crystalline silicon is used for driving circuits to improve field effect mobility and device performance, then the reliability and electrical properties are improved, but the fabrication process complexity and manufacturing cost increase due to multiple mask processes
Solution Approach 1:
The patent merges the formation of pixel TFTs and driving circuit TFTs into a single integrated structure on the same substrate. By combining the pixel region and driving region fabrication into one process flow using poly-crystalline silicon for both, the number of mask processes is reduced while maintaining high field effect mobility and device reliability.
Solution Approach 2:
The patent uses poly-crystalline silicon universally for both pixel TFT active layers and driving circuit TFT active layers. This multi-functional application of the same material system allows both high-performance pixel switching and reliable driving circuit operation without requiring separate material optimization processes.
2Manufacturing precision
If multiple mask processes are used to form driving circuits and pixel TFTs separately, then the manufacturing precision is maintained, but the productivity decreases and fabrication time increases
Solution Approach 1:
The patent combines the formation of pixel TFTs and driving circuit TFTs into a single integrated fabrication process. By using the same poly-crystalline silicon material system and overlapping process steps for both regions, manufacturing precision is maintained while significantly improving productivity and reducing fabrication time.
Solution Approach 2:
The patent performs preliminary formation of the poly-crystalline silicon layer that will serve both pixel TFT and driving circuit TFT functions. This preliminary action allows subsequent patterning steps to create both device types from the same material base, improving efficiency without sacrificing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of mask processes by at least two, lowering the time and cost associated with fabricating the array substrate while maintaining the performance of poly-crystalline silicon-based LCD devices.
Implementation Method 1
doping the source and drain regions of the first, second, and third active patterns with n- ions using the first, second, and third gate electrodes as a doping mask, doping the n- doped source and drain regions of the second active pattern with p+ ions
Data Source
AI summary
A method of fabricating a liquid crystal display device includes forming first, second, and third active patterns on a substrate having a pixel region and a driving region, wherein the first and second active patterns are in the driving region and the third active pattern is in the pixel region, the first, second, and third active patterns each having an active region, a source region, and a drain region with the source and drain regions on opposing sides of the active region, forming a gate insulator on the first, second, and third active patterns, forming first, second, and third gate electrodes on the gate insulator, wherein the first, second, and third gate electrodes correspond to the active regions of the first, second, and third active patterns, respectively, doping the source and drain regions of the first, second, and third active patterns with n− ions using the first, second, and third gate electrodes as a doping mask, doping the n− doped source and drain regions of the second active pattern with p+ ions, forming an interlayer insulating film on the first, second, and third gate electrodes and patterning the interlayer insulating film to form contact holes exposing each source and drain regions of the first, second, and third active patterns, and doping the source and drain regions of the first, second, and third active patterns with n+ ions through the contact holes.