Poly-Silicon Deposition Uniformity in SiGe HBT Emitter Fabrication
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Solution Overview
Problem
The fabrication of SiGe HBT devices faces challenges in scaling down the emitter opening, leading to difficulties in poly-silicon deposition in smaller areas, resulting in seam or void formation due to varying deposition rates on different material regions, which affects the manufacturability and electrical performance of the device.
Innovation Solution
A method is introduced to manipulate the deposition rates of poly-silicon by performing an atomic surface treatment and heating treatment on a substrate with regions of oxide, silicon nitride, and silicon materials, followed by chemical vapor deposition, to form a uniform poly-silicon layer, reducing the differences in deposition rates and improving conformality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the emitter opening is scaled down to achieve higher frequency performance, then the current amplification factor and characteristic frequency are improved, but the poly-silicon deposition uniformity deteriorates due to varying deposition rates on different material regions
Solution Approach 1:
The patent applies parameter changes by modifying the deposition process conditions, specifically using a reduced pressure environment (200-280 Torr) during chemical vapor deposition to achieve more uniform poly-silicon deposition across different material regions in scaled-down emitter openings, thereby resolving the contradiction between high-frequency performance and deposition uniformity
Solution Approach 2:
The patent introduces an intermediary approach by using a specific pressure range (200-280 Torr) as a mediating parameter between the conflicting requirements of small emitter size and uniform deposition, allowing the deposition process to proceed uniformly across oxide, silicon nitride, and silicon regions simultaneously
2Productivity
If conventional deposition methods are used on multi-material surfaces, then the process is simple and fast, but seam or void formation occurs due to different deposition rates on oxide, silicon nitride, and silicon regions
Solution Approach 1:
The patent changes the deposition pressure parameter to a specific range (200-280 Torr) to equalize deposition rates across different material regions, preventing seam and void formation while maintaining acceptable deposition speed, thus resolving the contradiction between productivity and reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures uniform poly-silicon deposition across different material regions, preventing seam or void formation, enhancing the manufacturability and electrical performance of SiGe HBT devices by improving the conformality of the poly-silicon layer and reducing manufacturing costs.
Implementation Method 1
a heating treatment in which the substrate is heated until a temperature of the substrate reaches a steady state and the steady state is maintained for a first period
Implementation Method 2
forming a poly-silicon layer on the first surface of the substrate
Data Source
AI summary
A method of manipulating deposition rates of poly-silicon and a method of manufacturing a silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) device are provided. The method of manipulating deposition rates of poly-silicon includes: providing a substrate, where a first surface of the substrate includes at least two of an oxide material region, a silicon nitride material region and a silicon material region; performing a first treatment on the first surface of the substrate, so as to manipulate the deposition rates of poly-silicon on different regions of the first surface to be closer; and forming a poly-silicon layer on the first surface of the substrate.