Charge-Trapping Polycrystalline Silicon Deposition With Short Gas Transition
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Solution Overview
Problem
Existing methods for forming a charge trapping layer on a silicon-on-insulator substrate are time-consuming, particularly due to the need for a seed portion formed at a relatively low temperature, which slows down the production rate without compromising quality.
Innovation Solution
A method involving the formation of a dielectric layer followed by a polycrystalline silicon charge trapping layer in a controlled atmosphere and temperature sequence, with a limited exposure to a carrier gas transition period of less than 30 seconds, allowing the trapping layer to be formed at temperatures between 1010°C and 1200°C.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a seed portion is formed at low temperature (below 1010°C) to ensure quality, then the charge trapping layer can be formed without excessive substrate deformation, but the production rate is significantly reduced
Solution Approach 1:
The method applies preliminary action by forming a thin seed layer (5-50 nm) at low temperature first, which prepares the substrate surface for subsequent high-temperature deposition. This preliminary low-temperature layer prevents excessive deformation during the main high-temperature charging step while enabling much faster production than forming the entire layer at low temperature.
Solution Approach 2:
The charge trapping layer formation is segmented into two distinct stages: a preliminary seed layer formation at low temperature (below 1010°C) and a main charging step at high temperature (above 1010°C). This segmentation allows each stage to be optimized independently - the seed layer ensures quality and prevents deformation, while the main layer provides fast deposition and high production rate.
2Productivity
If the charge trapping layer is formed at high temperature (above 1010°C) to increase deposition rate, then the production rate improves, but the substrate experiences excessive deformation
Solution Approach 1:
A thin seed layer is formed preliminarily at low temperature to prepare the substrate surface. This preliminary structure allows the subsequent high-temperature deposition to proceed rapidly without causing excessive substrate deformation, as the seed layer acts as a buffer and nucleation layer.
Solution Approach 2:
The deposition temperature parameter is changed between two stages: low temperature (below 1010°C) for the seed layer to prevent deformation, and high temperature (above 1010°C) for the main charging step to achieve high deposition rate. This dynamic parameter change resolves the contradiction between speed and quality.
3Reliability
If a thick charge trapping layer (1-10 microns) is formed to ensure effective charge trapping, then the electromagnetic coupling protection is improved, but the deposition time increases significantly
Solution Approach 1:
The formation of a thick charge trapping layer (1-10 microns) is segmented into two steps: a thin seed layer (5-50 nm) at low temperature followed by rapid high-temperature deposition. This segmentation enables the entire thick layer to be formed much faster than conventional single-step low-temperature methods, reducing deposition time while maintaining the required thickness for effective charge trapping.
Solution Approach 2:
The temperature parameter is changed from low (below 1010°C) to high (above 1010°C) after the seed layer is formed. This parameter change enables rapid deposition of the remaining thickness, significantly reducing the time required to form thick charge trapping layers while maintaining their effectiveness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the production rate of support substrates by enabling high-quality charge trapping layers to be formed quickly, with improved growth rates and reduced deformation, maintaining high radiofrequency performance.
Implementation Method 1
a dielectric layer on an exposed face of the base substrate by introducing a reactive gas into the chamber during a first period of time
Implementation Method 2
forming a polycrystalline silicon charge trapping layer directly on the dielectric layer by introducing a silicon-containing precursor gas into the chamber during a second period of time subsequent to the first
Data Source
Figure 1~3
Figure 4
AI summary
The invention relates to a method for preparing a support substrate (1) provided with a charge-trapping layer. The method comprises introducing a monocrystalline silicon base substrate (2) into a chamber of a deposition apparatus and, without withdrawing the base substrate (2) from the chamber and while sweeping the chamber using a carrier gas, the following successive steps: - forming a dielectric layer (3) on the base substrate (2) by introducing a reactive gas into the chamber for a first time period; - forming a polycrystalline silicon charge-trapping layer (4) directly on the dielectric layer (3) by introducing a silicon-containing precursor gas into the chamber for a second time period subsequent to the first. The duration for which the dielectric layer (3) is exposed solely to the carrier gas, between the first time period and the second time period, is less than 30 seconds and the charge-trapping layer (4) is formed at a temperature strictly of between 1010°C and 1200°C.