Poly-Silicon Gate Electrode Doping for Threshold Voltage Control
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in efficiently adjusting threshold voltages of MOSFETs without incurring additional manufacturing costs and undesirable short-channel effects, particularly in achieving different threshold voltages for NMOS transistors with the same gate insulator thickness and wafer.
Innovation Solution
The use of poly-silicon gate electrode layers with different impurity concentrations, achieved through separate doping processes or post-deposition steps, allows for the adjustment of threshold voltages without channel side doping, reducing manufacturing complexity and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If channel side dopant implantation is performed to adjust threshold voltage, then different threshold voltages can be achieved for NMOS transistors, but manufacturing costs increase due to additional implant steps and masking steps
Solution Approach 1:
The patent changes the parameter of dopant concentration in the gate electrode poly-silicon layer to control threshold voltage. By adjusting the phosphorus concentration in the poly-silicon gate electrode (ranging from 1×10^19 to 1×10^21 atoms/cm³), different threshold voltages are achieved without requiring additional channel implantation steps, thus reducing manufacturing complexity and costs.
2Manufacturing precision
If channel counter-doping is performed to obtain different threshold voltages, then NMOS transistors with different threshold voltages can be achieved, but undesirable short-channel effects arise
Solution Approach 1:
The patent changes the dopant concentration parameter in the gate electrode rather than in the channel region. By controlling the phosphorus concentration in the poly-silicon gate electrode, threshold voltage is adjusted without performing channel counter-doping, thereby avoiding the degradation of short-channel effects that would result from channel region doping.
3Manufacturing precision
If multiple implant masks are used to achieve different dopant profiles, then different threshold voltages can be obtained, but device complexity increases
Solution Approach 1:
The patent simplifies the device structure by changing the dopant concentration parameter in the gate electrode poly-silicon layer instead of using multiple implant masks for channel doping. This approach achieves different threshold voltages through a single doping parameter adjustment in the gate electrode, eliminating the need for multiple masking steps and reducing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the precise adjustment of threshold voltages for MOSFETs, reducing manufacturing costs and minimizing short-channel effects, while maintaining the same thickness and process efficiency for gate electrodes.
Implementation Method 1
The use of poly-silicon gate electrode layers with different impurity concentrations, achieved through separate doping processes or post-deposition steps, allows for the adjustment of threshold voltages
Data Source
AI summary
Semiconductor devices including structures of gate electrode layers are disclosed. An example semiconductor device according to the disclosure includes a semiconductor substrate and first and second gate electrodes above the semiconductor substrate. Each gate electrode of the first and second gate electrodes includes a gate insulator above the semiconductor substrate, a first gate electrode layer on the gate insulator, and a second gate electrode layer on the first gate electrode layer. The second gate electrode layers of the first and second gate electrodes have impurity concentrations that are different from one another.