Polycrystalline Silicon TFT Crystallization Defect Control
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Solution Overview
Problem
The challenge in display device manufacturing lies in minimizing defects during the crystallization process of amorphous silicon to polycrystalline silicon, which affects the electron mobility and stability of thin film transistors, particularly in pixel circuits.
Innovation Solution
A display device design that includes a specific structure with a lower conductive pattern, insulating layers, and a semiconductor pattern, where a sacrificial layer is used to create an empty space and facilitate the crystallization of the semiconductor pattern, minimizing defects and enhancing electron mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If amorphous silicon is used as the semiconductor active layer, then the manufacturing process is simpler, but the electron mobility is low (about 1 cm2/Vs or less)
Solution Approach 1:
The patent changes the physical and chemical parameters of the semiconductor material by transitioning from amorphous silicon to polycrystalline silicon through controlled crystallization processes. This parameter change increases electron mobility from about 1 cm2/Vs to higher values, resolving the contradiction between ease of manufacture and electron mobility
Solution Approach 2:
The patent utilizes phase transition from amorphous to polycrystalline state through laser annealing or thermal annealing processes. This phase transition fundamentally changes the material properties, achieving high electron mobility while maintaining compatibility with existing manufacturing processes
2Reliability
If polycrystalline silicon is used to replace amorphous silicon, then electron mobility and stability are improved, but defects occur during the crystallization process
Solution Approach 1:
The patent applies preliminary actions by forming a carefully designed insulating layer structure with protruding regions and empty spaces before the crystallization process. This preliminary structure preparation ensures uniform laser energy distribution and controlled crystallization, minimizing defects while achieving high electron mobility
Solution Approach 2:
The patent introduces an insulating layer as an intermediary element between the substrate and the semiconductor layer. This intermediary structure controls the crystallization process by managing heat distribution and preventing direct contact between the laser beam and the substrate, thereby reducing crystallization defects
3Reliability
If the insulating layer completely covers the lower conductive pattern, then insulation is improved, but control over the crystallization process is reduced
Solution Approach 1:
The patent segments the insulating layer into different regions: a first insulating pattern that covers the lower conductive pattern for insulation, and a protruding region with an empty space that exposes the substrate. This segmentation allows simultaneous achievement of good insulation and controlled crystallization by enabling selective laser energy distribution
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for high-resolution display devices with improved electron mobility and stability by reducing defects in the crystallization process, leading to better performance and reliability of the thin film transistors.
Implementation Method 1
minimizing defects occurring in the process of crystallizing amorphous silicon into polycrystalline silicon
Data Source
AI summary
A display device and a method of manufacturing a display device are provided. A display device includes a lower conductive pattern disposed on a substrate, a lower insulating layer disposed on the lower conductive pattern, the lower insulating layer including a first lower insulating pattern including an overlapping region overlapping the lower conductive pattern, and a protruding region. The display device includes a semiconductor pattern disposed on the first lower insulating pattern and having a side surface, the side surface being aligned with a side surface of the first lower insulating pattern or disposed inward from the side surface of the first lower insulating pattern, a gate insulating layer disposed on the semiconductor pattern, a gate electrode disposed on the gate insulating layer, and an empty space disposed between the substrate and the protruding region of the first lower insulating pattern.