Polycrystalline Silicon TFT Offset Structure via Self-Aligned Doping
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Solution Overview
Problem
The existing manufacturing methods for polycrystalline silicon thin film transistors (TFTs) used in organic light emitting displays require additional masks for forming offset structures, leading to complex doping processes, low yield, and reduced productivity due to the need for precise alignment.
Innovation Solution
A TFT structure with at least two polycrystalline silicon layers and low conductivity regions adjacent to the gate, where impurities are doped at a lower concentration, eliminating the need for an additional mask by using an angled implantation method to create a shade region, thereby forming an offset structure without increasing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an offset structure is formed using a locally varying doping process with an additional mask, then current leakage is reduced, but the manufacturing process becomes complicated and productivity decreases
Solution Approach 1:
The patent extracts the mask formation step from the offset structure manufacturing process by using a self-aligned approach where the offset region is formed by the natural projection of the gate electrode during a single doping process, eliminating the need for additional masks and alignment steps
Solution Approach 2:
The patent merges the offset region formation with the main channel region formation by using a single doping process that simultaneously creates both regions, combining what were previously separate manufacturing steps into one integrated process
2Reliability
If an additional mask is used for differential doping in the offset region, then current leakage is reduced, but the doping process becomes complicated and yield is low
Solution Approach 1:
The gate electrode serves as a self-aligned mask during the doping process, automatically defining the offset region boundaries without requiring external masking, thereby eliminating alignment errors and simplifying the doping process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces leakage current and enhances charge carrier mobility, simplifying the manufacturing process, reducing costs, and improving yield by eliminating the need for additional masks, while maintaining low power consumption and reducing crosstalk between pixels.
Implementation Method 1
a gate insulating layer interposed between the gate and the two polycrystalline silicon layers
Implementation Method 2
low conductivity regions are disposed adjacent to one edge of the gate and are formed between the channel region and one high conductivity region of each polycrystalline silicon layer
Data Source
AI summary
A transistor includes; at least two polycrystalline silicon layers disposed substantially parallel to each other, each polycrystalline silicon layer including a channel region and at least two high conductivity regions disposed at opposing sides of the channel region; a gate which corresponds to the channel region of the two polycrystalline silicon layers and which crosses the two polycrystalline silicon layers, and a gate insulating layer interposed between the gate and the two polycrystalline silicon layers, wherein low conductivity regions are disposed adjacent to one edge of the gate and are formed between the channel region and one high conductivity region of each polycrystalline silicon layer.