Poly-Stranded FEC Layout for Parallel Optical Transmission

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional forward error correction techniques in optical communication systems, such as product codes and braided codes, have inferior error rates and are not amenable to efficient parallel implementation, which is crucial for high-speed communication systems.

Innovation Solution

A new class of error correcting codes, referred to as poly-stranded error correcting codes, organizes data bits into a specific arrangement of blocks and strands, allowing for parallel encoding and decoding, using base error correcting codes to generate parity bits across different portions of the strands, facilitating high-speed and reliable data transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional forward error correction techniques (product codes, braided codes) are used, then implementation is simpler, but error rate is inferior and parallel implementation efficiency is poor

Engineering Contradiction:
Improveerror rateVSAvoidparallel implementation efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the data into multiple strands, where each strand is independently encoded using base FEC codes. This segmentation enables parallel processing of multiple strands simultaneously, improving both error correction capability and implementation efficiency. The systematic arrangement of strands allows independent encoding operations to proceed in parallel while maintaining overall code performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimensional structure by organizing data into multi-strand arrangements with specific geometric patterns (e.g., strands positioned at corners, edges, or interior regions). This dimensional organization transforms the traditional single-block FEC structure into a multi-dimensional array, enabling both improved error correction through diverse strand interactions and efficient parallel processing through independent strand encoding.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If stronger FEC codes are implemented to reduce errors, then reliability improves, but system complexity and processing overhead increase

Engineering Contradiction:
Improveerror rateVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

By dividing the FEC code into multiple independent strands that can be encoded separately using base codes, the patent reduces the complexity of implementing a single strong FEC code. Each strand uses simpler base FEC codes, but the collective arrangement of multiple strands achieves the equivalent or superior error correction performance of a single complex code, thereby reducing overall system complexity while maintaining reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges multiple simple base FEC codes applied to different strands to achieve the performance of a single strong FEC code. By combining the error correction capabilities of multiple independent strands in a systematic arrangement, the system achieves high reliability without requiring each individual component to be complex, thus reducing overall device complexity while maintaining or improving error correction performance.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP3609082B1Array based forward error correction for optical transmission
Publication Date: 2024.06.19 ACACIA COMMUNICATIONS INC
  • EP3609082B1 patent drawingFigure 1A~1C
  • EP3609082B1 patent drawingFigure 2
  • EP3609082B1 patent drawingFigure 3A

AI summary

A method, apparatus for forward error correction of data to be transmitted over an optical communications channel. The forward error correction scheme involves: receiving data bits; organizing the data bits into an arrangement (300) having a plurality of blocks organized into rows and columns and into a plurality of strands including a first strand of blocks (307) that includes a back portion comprising a first row of the plurality of blocks (303), and a front portion comprising blocks from at least two different columns in at least two different rows other than the first row of blocks; and encoding at least some of the data bits in the arrangement using a first error correcting code at least in part by generating first parity bits by applying the first error correcting code to first data bits in the front portion of the first strands and second data bits in the back portion of the first strand.