Polycrystal Pattern Measurement with Alignment-Based Error Reduction
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Solution Overview
Problem
The measurement of critical pattern dimensions in semiconductor processes, particularly for silicon polycrystal layers at technology nodes 28 nm and beyond, is plagued by significant errors due to misalignment between user-designed data sets and wafer circuit patterns, leading to inefficient and inaccurate results when using advanced electron beam linewidth defect scanning machines like ASML's eP5.
Innovation Solution
A method is introduced to classify wafer circuit patterns into two types: those easily measurable and those not easily measurable by the electron beam linewidth defect scanning machine, with automatic measurements for the first type and manual alignment followed by repeated measurements for the second type, using criteria such as line-end corners and linewidth standard deviation to reduce measurement errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If automatic measurement is performed on all wafer circuit patterns using electron beam linewidth defect scanning machine, then measurement efficiency is improved, but measurement precision deteriorates due to misalignment between user-designed data sets and wafer circuit patterns
Solution Approach 1:
The patent segments wafer circuit patterns into two categories: easily measurable patterns and difficult-to-measure patterns. This segmentation allows different measurement approaches to be applied to different pattern types, thereby maintaining both high efficiency for suitable patterns and high accuracy for challenging patterns.
Solution Approach 2:
The patent applies different measurement qualities/approaches to different local cases: automatic measurement for easily measurable patterns and manual alignment measurement for difficult-to-measure patterns. This local differentiation resolves the contradiction by optimizing the measurement approach according to the specific characteristics of each pattern type.
2Measurement precision
If manual alignment is performed for difficult-to-measure patterns, then measurement precision is improved, but loss of time increases due to the need for repeated measurements and data checking
Solution Approach 1:
The patent performs preliminary classification of patterns before measurement to identify which patterns require manual alignment. This preliminary action prevents unnecessary manual alignment for easily measurable patterns, thereby reducing time loss while ensuring that only patterns that truly need it receive the time-consuming manual alignment treatment.
Solution Approach 2:
The patent implements a feedback mechanism where measurement results are checked and verified. If measurement errors are detected, the system triggers repeated measurements and data re-checking. This feedback loop ensures high precision while minimizing time loss by only repeating measurements when necessary, rather than universally repeating all measurements.
3Measurement precision
If classification rules based on line-end corners and linewidth standard deviation are applied, then measurement precision is improved by identifying difficult-to-measure patterns, but device complexity increases due to additional classification criteria
Solution Approach 1:
The patent uses specific measurable parameters (number of line-end corners and linewidth standard deviation) to classify patterns. By changing from subjective classification to objective parameter-based classification, the system achieves higher precision in identifying difficult-to-measure patterns while keeping the classification rules relatively simple and quantifiable.
Data Source
AI summary
A method is disclosed for reducing measurement errors on wafer circuit pattern critical dimensions of polycrystal layers: providing wafer circuit patterns to be measured; defining rules to classify the wafer circuit patterns into a first type and a second type, the first type is easily measurable and the second type is not easily measurable with an electron beam linewidth defect scanning machine; for the first type, performing automatic measurement with the machine; for the second type, aligning the user designed wafer circuit patterns manually with the second type of wafer circuit patterns, and performing by the machine to obtain measurement results twice.