Polycrystalline Channel Formation With Controlled Grain Boundaries
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Solution Overview
Problem
Laser annealing of amorphous silicon films to form polycrystalline silicon films results in random grain boundary positions, leading to low carrier mobility and significant device-to-device variations in thin film transistors.
Innovation Solution
A method involving lateral recrystallization of amorphous semiconductor material from sidewalls of recesses defined within a dielectric layer, where spacers are used to control the position and number of grain boundaries, allowing for the formation of polycrystalline semiconductor regions with large grain sizes and controlled grain boundary locations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If laser annealing is used to form polycrystalline silicon films from amorphous silicon, then the film can be crystallized and formed, but the grain boundaries are randomly positioned leading to low carrier mobility and device variations
Solution Approach 1:
The patent applies preliminary action by forming spacers and recesses in the dielectric layer before crystallization. These structures predefine the locations where grain boundaries will form during subsequent laser annealing, ensuring controlled grain boundary positions rather than random formation. The spacers act as barriers that guide crystal growth and determine grain boundary locations in advance.
Solution Approach 2:
The patent introduces spacers as intermediary structures between the dielectric layer and the crystallization process. These spacers mediate the crystallization by physically guiding grain growth and determining where grain boundaries form. The recesses also serve as intermediaries that confine and control the crystallization process, ensuring uniform grain structures.
2Ease of manufacture
If conventional recrystallization is used to form polycrystalline silicon, then the process is simple, but the crystal grain size is small and grain boundaries are numerous acting as traps and recombination centers
Solution Approach 1:
The patent segments the crystallization process by creating multiple recesses in the dielectric layer, each containing amorphous silicon that will crystallize independently. This segmentation allows each region to form larger, more uniform grains with controlled boundaries, rather than having a single large polycrystalline region with numerous random grain boundaries.
Solution Approach 2:
The patent changes the physical parameters of the crystallization process by using laser annealing with specific energy densities and durations. This allows precise control over grain growth kinetics, enabling larger grain sizes and fewer grain boundaries while maintaining process feasibility. The laser parameters are optimized to achieve complete crystallization while controlling grain morphology.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances carrier mobility, improves device performance, stability, and reliability, and achieves uniformity of thin film transistors across the substrate by forming polycrystalline semiconductor regions with controlled grain sizes and boundary positions.
Implementation Method 1
Laser annealing of amorphous silicon films to form polycrystalline silicon films
Implementation Method 2
recrystallizing the amorphous semiconductor layer to form a polycrystalline semiconductor layer
Data Source
AI summary
A method for forming a polycrystalline semiconductor layer includes forming a plurality of spacers over a dielectric layer, etching the dielectric layer using the plurality of spacers as an etch mask to form a recess in the dielectric layer, depositing an amorphous semiconductor layer over the plurality of spacers and the dielectric layer to fill the recess, and recrystallizing the amorphous semiconductor layer to form a polycrystalline semiconductor layer.