Polycrystalline Isolation Layer for III-V Semiconductor Leakage
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Solution Overview
Problem
Semiconductor structures, particularly high-voltage power electronic devices, face challenges with high capacitance and body-to-body leakage, which existing measures like triple well isolation and silicon-on-insulator wafers do not fully address, necessitating improved electrical isolation methods.
Innovation Solution
A semiconductor substrate with a single-crystal material and a layer stack including a III-V compound semiconductor material, where a polycrystalline layer is formed beneath the stack through ion implantation and thermal treatment, enhancing electrical resistivity and reducing radiofrequency losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If triple well isolation is used to reduce body-to-body leakage, then electrical isolation is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent extracts the isolation function from complex multi-well structures and implements it through a single polycrystalline layer formed by ion implantation and thermal treatment, simplifying the isolation structure while maintaining electrical isolation effectiveness
Solution Approach 2:
The patent changes the crystalline state parameter of the semiconductor substrate by transforming a single-crystal region into a polycrystalline layer through controlled thermal treatment, thereby achieving electrical isolation without increasing structural complexity
2Reliability
If silicon-on-insulator wafer is used to reduce capacitance, then electrical isolation is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent uses a temporary polycrystalline layer formed through ion implantation and thermal treatment that serves the isolation function during device operation, avoiding the need for expensive silicon-on-insulator wafers while maintaining manufacturing simplicity
Solution Approach 2:
The patent modifies the electrical properties of the substrate by creating a polycrystalline region with high resistivity through thermal treatment, achieving isolation效果 without requiring complex silicon-on-insulator structures
3Loss of energy
If polycrystalline layer is formed to reduce radiofrequency losses, then electrical isolation is improved, but manufacturing process complexity increases
Solution Approach 1:
The patent replaces complex mechanical isolation structures with a field-based solution using ion implantation and thermal treatment to create a polycrystalline layer with high resistivity, reducing radiofrequency losses through material property modification rather than structural complexity
Solution Approach 2:
The patent utilizes the phase transition from single-crystal to polycrystalline state through controlled thermal treatment, creating a region with different electrical properties that reduces radiofrequency losses without requiring complex manufacturing processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in improved electrical isolation and linearity of active device structures, reducing radiofrequency losses and addressing capacitance and leakage issues, while allowing for the formation of high-electron-mobility transistors with enhanced performance.
Implementation Method 1
enhancing electrical resistivity
Implementation Method 2
formed by ion implantation
Implementation Method 3
thermal treatment
Data Source
AI summary
Semiconductor structures including electrical isolation and methods of forming a semiconductor structure including electrical isolation. A layer stack is formed on a semiconductor substrate comprised of a single-crystal semiconductor material. The layer stack includes a semiconductor layer comprised of a III-V compound semiconductor material. A polycrystalline layer is formed in the semiconductor substrate. The polycrystalline layer extends laterally beneath the layer stack.