Polycrystalline Isolation Region in SOI Substrate
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for creating polycrystalline isolation regions in semiconductor-on-insulator (SOI) substrates for RF devices are expensive, time-consuming, and prone to defects, as they require etching trenches and refilling them with dielectric, which complicates the process and increases the risk of harming active devices.
Innovation Solution
A method involving implanting dopants through monocrystalline active region fill shapes and the buried insulator layer into the semiconductor substrate, followed by thermal cycles to convert the material into polycrystalline active regions and isolation regions, eliminating the need for trench etching and refill processes, and allowing for selective conversion between monocrystalline and polycrystalline active regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If trench etching and refill processes are used to create polycrystalline isolation regions, then isolation effectiveness is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent extracts and eliminates the trench etching and refill steps from the conventional process. Instead of creating physical trenches and filling them, the invention uses selective dopant implantation followed by thermal cycling to directly transform the substrate material into polycrystalline isolation regions, removing the intermediate trench structures entirely
Solution Approach 2:
The patent replaces the mechanical trench etching and refill system with a chemical/thermal process. Dopant implantation and thermal cycling induce phase transformation of the semiconductor substrate material directly into polycrystalline structures, substituting mechanical fabrication steps with material transformation processes
2Reliability
If trench etching and refill processes are used to create polycrystalline isolation regions, then isolation effectiveness is improved, but manufacturing time increases
Solution Approach 1:
The patent removes the time-consuming trench etching and multiple refill steps from the manufacturing sequence. The simplified process of dopant implantation followed by thermal cycling reduces the number of process steps and overall manufacturing time while achieving the same isolation effectiveness
Solution Approach 2:
The patent performs dopant implantation in advance before thermal cycling. This preliminary action prepares the material for phase transformation, allowing the subsequent thermal process to efficiently create polycrystalline structures without requiring repeated processing steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces harmonics and parasitic losses in RF devices by creating a polycrystalline isolation region under selected active devices without the complexity and expense of traditional methods, while minimizing the risk of defects and improving manufacturing efficiency.
Implementation Method 1
implanting dopants through monocrystalline active region fill shapes and the buried insulator layer into the semiconductor substrate
Implementation Method 2
thermal cycles to convert the material into polycrystalline active regions and isolation regions
Implementation Method 3
annealing to reform the first polycrystalline active region into a first reformed monocrystalline active region
Data Source
AI summary
A structure includes a semiconductor-on-insulator (SOI) substrate including a semiconductor substrate, a buried insulator layer over the semiconductor substrate, and an SOI layer over the buried insulator layer. The structure also includes a first active device and a second active device. At least one polycrystalline active region fill shape is in the SOI layer. A polycrystalline isolation region is in the semiconductor substrate under the buried insulator layer. The polycrystalline isolation region is under the first active device, but not under the second active device. The polycrystalline isolation region extends to different depths into the semiconductor substrate. The first and second active devices may include monocrystalline active regions, and a third polycrystalline active region may also be in the SOI layer over the polycrystalline isolation region.