Polycrystalline Silicon Layer Processing for Low-Roughness TFT Arrays

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Solution Overview

Problem

The existing methods for manufacturing polycrystalline silicon layers for display devices result in high surface roughness, which affects the uniformity of the threshold voltage of thin film transistors and can damage the gate insulation layer.

Innovation Solution

A method involving the cleaning of an amorphous silicon layer with hydrofluoric acid and rinsing with hydrogenated deionized water, followed by laser irradiation to form a polycrystalline silicon layer with reduced surface roughness, achieving a root-mean-square value of 4 nm or less and grain sizes between 150 nm to 200 nm.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional methods are used to manufacture polycrystalline silicon layers, then the manufacturing process is simple, but the surface roughness is high which affects TFT performance

Engineering Contradiction:
Improvesurface roughnessVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The amorphous silicon layer is cleaned with hydrofluoric acid and rinsed with hydrogenated deionized water before laser irradiation. This preliminary cleaning action removes surface contaminants and prepares the surface for better crystallization, resulting in reduced surface roughness of the polycrystalline silicon layer without significantly complicating the overall manufacturing process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent specifies precise parameters for the cleaning process including hydrofluoric acid concentration and rinsing conditions, as well as laser irradiation parameters. By optimizing these parameters, the surface roughness is controlled to achieve RMS values of 4 nm or less, improving TFT threshold voltage uniformity while maintaining a manageable manufacturing process

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If high surface roughness polycrystalline silicon layers are used, then the manufacturing process is faster, but the threshold voltage uniformity of TFTs deteriorates

Engineering Contradiction:
Improvethreshold voltage uniformityVSAvoidmanufacturing speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The cleaning treatment with hydrofluoric acid and hydrogenated deionized water is performed as a preliminary step before laser crystallization. This preliminary action ensures that the amorphous silicon layer surface is properly prepared, leading to uniform polycrystalline silicon formation with consistent threshold voltage characteristics across the TFT array

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses liquid-based cleaning methods (hydrofluoric acid solution and hydrogenated deionized water rinsing) to treat the amorphous silicon layer. This hydraulic approach effectively removes surface contaminants and oxides, enabling uniform crystallization and consistent electrical properties without significantly extending the manufacturing cycle

Inventive Principle:
Principle #29Pneumatics and hydraulics

3Reliability

If high surface roughness polycrystalline silicon layers are used, then the manufacturing process is simpler, but the gate insulation layer is damaged

Engineering Contradiction:
Improvegate insulation layer protectionVSAvoidcleaning process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The amorphous silicon layer is cleaned with hydrofluoric acid and rinsed with hydrogenated deionized water before laser irradiation to form the polycrystalline silicon layer. This preliminary cleaning action removes surface contaminants and prepares the surface for better crystallization, resulting in reduced surface roughness of the polycrystalline silicon layer

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent specifies precise parameters for the cleaning process including hydrofluoric acid concentration and rinsing conditions, as well as laser irradiation parameters. By optimizing these parameters, the surface roughness is controlled to achieve RMS values of 4 nm or less, improving TFT threshold voltage uniformity while maintaining a manageable manufacturing process

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach decreases the surface roughness of the polycrystalline silicon layer, leading to more uniform threshold voltages and improved protection of the gate insulation layer, enhancing the performance and reliability of thin film transistors in display devices.

Implementation Method 1

cleaning the amorphous silicon layer with hydrofluoric acid

Methodology Applied
Scientific EffectChemical etching:

Implementation Method 2

irradiating the amorphous silicon layer with a laser beam to form a polycrystalline silicon layer

Methodology Applied
Scientific EffectLaser heating: Laser

Implementation Method 3

crystallizing the amorphous silicon layer to form the polycrystalline silicon layer

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Data Source

PatentUS12058888B2Display device having polycrystalline silicon layer
Publication Date: 2024.08.06 SAMSUNG DISPLAY CO LTD
  • US12058888B2 patent drawing
  • US12058888B2 patent drawing
  • US12058888B2 patent drawing

AI summary

A method of manufacturing a polycrystalline silicon layer for a display device includes the steps of forming an amorphous silicon layer on a substrate, cleaning the amorphous silicon layer with hydrofluoric acid, rinsing the amorphous silicon layer with hydrogenated deionized water, and irradiating the amorphous silicon layer with a laser beam to form a polycrystalline silicon layer.