Polycrystalline Carrier Substrate for Low-Warpage Piezoelectric Bonding

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Solution Overview

Problem

Existing acoustic wave devices face challenges with substrate warpage, leading to manual handling and alignment issues, which affect process efficiency and product yield.

Innovation Solution

A carrier substrate with a polycrystalline material and controlled surface roughness and thickness is used, combined with double-sided polishing and sandblasting to reduce warpage and transmittance, enabling automatic handling and precise alignment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the carrier substrate thickness is reduced to improve flexibility and bonding quality, then the bonding quality improves, but the substrate becomes more prone to chipping and warpage increases

Engineering Contradiction:
Improvebonding qualityVSAvoidchip resistance
Core Design Contradiction:
Manufacturing precisionVSStrength

Solution Approach 1:

The patent applies parameter changes by precisely controlling the carrier substrate thickness within the range of 50-150 μm and the grain size within 5-50 μm. This optimization balances the substrate's flexibility for bonding with sufficient strength to prevent chipping, resolving the contradiction between bonding quality and chip resistance

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses polycrystalline materials with controlled grain structures as the carrier substrate. The composite microstructure with specific grain size distribution provides both the flexibility needed for high-quality bonding and the structural integrity to resist chipping during handling and processing

Inventive Principle:
Principle #40Composite materials

2Reliability

If manual loading and unloading is implemented to handle warpage, then warpage can be managed, but process efficiency and productivity decrease

Engineering Contradiction:
Improvewarpage controlVSAvoidprocess efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-controlling the carrier substrate thickness and grain size during manufacturing to achieve appropriate warpage levels before the bonding process. This preliminary control enables subsequent automatic handling and processing without requiring manual intervention, thus maintaining high productivity while ensuring warpage management

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

By optimizing the carrier substrate thickness to 50-150 μm and grain size to 5-50 μm, the patent achieves appropriate warpage control that allows automatic equipment operations. This parameter optimization eliminates the need for manual loading and unloading, thereby maintaining both warpage control and high process efficiency

Inventive Principle:
Principle #35Parameter changes

3Shape

If adjustments are made to reduce warpage, then warpage decreases, but other performance parameters deteriorate

Engineering Contradiction:
ImprovewarpageVSAvoidperformance parameters
Core Design Contradiction:
ShapeVSReliability

Solution Approach 1:

The patent applies parameter changes by simultaneously optimizing multiple parameters: carrier substrate thickness (50-150 μm), grain size (5-50 μm), and surface roughness (Ra: 0.1-1.0 μm). This multi-parameter optimization achieves appropriate warpage control while maintaining excellent bonding quality, electrical performance, and mechanical strength, avoiding deterioration of other performance parameters

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies local quality by creating different surface characteristics on the carrier substrate: the front surface maintains smoothness (Ra: 0.1-1.0 μm) for high-quality bonding, while the back surface has controlled roughness for stress distribution. This localized quality differentiation achieves warpage control without compromising bonding quality or electrical performance

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20260039272A1Substrate, Electronic Device, and Module
Publication Date: 2026.02.05 QUANZHOU SANAN INTEGRATED CIRCUIT CO LTD
  • US20260039272A1 patent drawing
  • US20260039272A1 patent drawing
  • US20260039272A1 patent drawing

AI summary

The present invention discloses a substrate, an electronic device, and a module. The substrate provided by embodiments comprises a carrier substrate formed from a polycrystalline material and including a plurality of grains, wherein the carrier substrate includes a main support surface for supporting a piezoelectric layer and a back surface opposite to the main support surface, wherein the back surface has a surface roughness with a maximum height greater than or equal to 3 μm, and an arithmetic mean height greater than or equal to 0.2 μm; wherein the plurality of grains having a maximum grain size, and the carrier substrate having a thickness of greater than or equal to twice the maximum grain size.