Polyhedral Compilation Focalization for Deep Memory Hierarchies

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Solution Overview

Problem

Polyhedral compilation techniques face scalability issues when dealing with deep memory hierarchies, leading to increased computational complexity and prolonged compilation times due to the exponential growth of polyhedra dimensions, which existing methods struggle to efficiently manage.

Innovation Solution

The introduction of focalisation and defocalisation operators to reduce the number of dimensions in polyhedra, allowing for targeted optimizations at each memory level within a hierarchical hardware architecture, thereby simplifying the compilation process and maintaining program semantics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If polyhedral compilation techniques are applied to deep memory hierarchies, then optimization power and performance improvement are enhanced, but computational complexity increases exponentially and compilation time becomes unacceptably long

Engineering Contradiction:
Improveoptimization powerVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the deep memory hierarchy into multiple levels, with each level having its own independent polyhedral compilation process. The compiler divides the loop nest into level-specific loop nests for each memory level, allowing independent optimization at each level rather than attempting to optimize the entire deep hierarchy simultaneously. This segmentation reduces the computational complexity from exponential in the total number of levels to polynomial in the number of levels.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension to the polyhedral model by adding a level index to track which memory level each iteration belongs to. This transforms the iteration space from d-dimensional to (d+1)-dimensional, where the extra dimension enables the compiler to manage and optimize each memory level independently while maintaining the overall program semantics. This dimensional extension allows the compiler to handle deep hierarchies without exponential complexity growth.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If multi-level tiling is performed to exploit every memory level, then memory hierarchy exploitation is improved, but the number of polyhedra dimensions increases significantly slowing down compilation

Engineering Contradiction:
Improvememory hierarchy exploitationVSAvoidcompilation time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the tiling process into level-specific tiling operations. Each memory level undergoes independent tiling with its own tile size parameters, rather than applying a single multi-level tiling transformation. This allows the compiler to exploit each memory level's characteristics optimally while keeping the computational burden of each tiling operation manageable and independent of the total hierarchy depth.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies tiling selectively at each memory level based on that level's specific requirements, rather than uniformly applying multi-level tiling across the entire hierarchy. The compiler can choose to apply aggressive tiling at levels that benefit most from it while using lighter transformations at other levels, reducing overall compilation time while still achieving effective memory hierarchy exploitation.

Inventive Principle:
Principle #16Partial or excessive action

3Extent of automation

If the polyhedral model is used to optimize programs for hierarchical platforms, then automatic parallelization and memory optimization are achieved, but the model becomes exponentially slower as polyhedra dimensionality increases

Engineering Contradiction:
Improveautomatic parallelizationVSAvoidcompilation speed
Core Design Contradiction:
Extent of automationVSSpeed

Solution Approach 1:

The patent segments the automatic parallelization process into level-specific parallelization passes. Each memory level is analyzed and parallelized independently using polyhedral techniques, with the results combined to produce the final parallelized program. This segmentation maintains the automation benefits of polyhedral compilation while reducing the computational burden from exponential in total levels to polynomial in the number of levels.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary analysis and transformation of the loop nest into level-specific representations before applying polyhedral optimizations. By pre-organizing the loop structure according to memory levels and introducing level indexing early in the compilation process, the compiler prepares the data in a form that enables efficient polyhedral optimization at each level without requiring exponential computational resources.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11537373B2Systems and methods for scalable hierarchical polyhedral compilation
Publication Date: 2022.12.27 QUALCOMM INC
  • US11537373B2 patent drawing
  • US11537373B2 patent drawing
  • US11537373B2 patent drawing

AI summary

A system for compiling programs for execution thereof using a hierarchical processing system having two or more levels of memory hierarchy can perform memory-level-specific optimizations, without exceeding a specified maximum compilation time. To this end, the compiler system employs a polyhedral model and limits the dimensions of a polyhedral program representation that is processed by the compiler at each level using a focalization operator that temporarily reduces one or more dimensions of the polyhedral representation. Semantic correctness is provided via a defocalization operator that can restore all polyhedral dimensions that had been temporarily removed.