Polymer Adhesive Supporting Layer for Low-Temperature Chip Packaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing eutectic bonding method for semiconductor chip packaging is prone to mechanical stress and failure due to high demands on temperature and heat cycle control, making it challenging for mass production and reliable connections between semiconductor chips and interposers.
Innovation Solution
A polymer adhesive supporting layer is used to substitute solder bumps, providing a higher process margin and lower temperature bonding process, which reduces the risk of mechanical stress and facilitates mass production by using thermal or ultraviolet curing materials like epoxy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If eutectic bonding method is used to connect semiconductor chip and interposer, then electrical connection is achieved, but mechanical stress and connection failure occur due to high temperature and strict process control requirements
Solution Approach 1:
The patent changes the bonding temperature parameter from high temperature (400-500°C for eutectic bonding) to low temperature (room temperature or slightly elevated). This is achieved by replacing solder bumps with polymer adhesive supporting layers, fundamentally altering the thermal parameters of the bonding process to eliminate mechanical stress and connection failure issues
Solution Approach 2:
The patent replaces the complex eutectic bonding process with a simpler polymer adhesive-based connection method. The polymer adhesive supporting layer serves as a temporary but effective bonding medium that can be applied and cured without strict process control, eliminating the need for precise temperature and heat cycle management
2Strength
If eutectic bonding method is used, then metal interface bonding is formed, but high temperature affects electronic devices in the chip package
Solution Approach 1:
The patent introduces a polymer adhesive supporting layer as an intermediary between the semiconductor chip and interposer. This intermediary material enables mechanical and electrical connection without requiring high temperature, thus protecting sensitive electronic devices from thermal damage while still achieving reliable bonding
Solution Approach 2:
The patent fundamentally changes the temperature parameter from high (400-500°C) to low (room temperature or slightly elevated). The polymer adhesive supporting layer achieves bonding at temperatures that do not harm electronic devices, eliminating the harmful thermal effects associated with traditional eutectic bonding
3Temperature
If polymer adhesive supporting layer is used instead of solder bumps, then lower temperature bonding is achieved, but connection strength must be maintained
Solution Approach 1:
The patent uses composite material structure where the polymer adhesive supporting layer combines adhesive properties with mechanical support functionality. This composite approach allows the material to provide both bonding at low temperature and sufficient connection strength to replace traditional solder bumps
4Reliability
If eutectic bonding method is used, then electrical connection is achieved, but production cost and complexity increase due to strict process control requirements
Solution Approach 1:
The patent replaces the complex and expensive eutectic bonding process with a simpler polymer adhesive-based method. The polymer adhesive supporting layer can be applied using standard coating techniques and cured without expensive equipment, making manufacturing easier and more cost-effective while maintaining electrical connection reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The polymer adhesive supporting layer ensures reliable connections between semiconductor chips and interposers with lower thermal budgets, reducing the risk of high temperature effects and enabling more efficient and cost-effective mass production of stereoscopic semiconductor chip packages.
Implementation Method 1
The polymer adhesive supporting layer 130 is interposed between the semiconductor chip 110 and the interposer 120
Implementation Method 2
The polymer adhesive supporting layer includes a thermal curing material, an ultraviolet curing material, or a combination thereof
Implementation Method 3
The polymer adhesive supporting layer includes a thermal curing material, an ultraviolet curing material, or a combination thereof
Data Source
AI summary
A chip package includes a semiconductor chip, an interposer, a polymer adhesive supporting layer, a redistribution layer and a packaging layer. The semiconductor chip has a sensor device and a conductive pad electrically connected to the sensing device, and the interposer is disposed on the semiconductor chip. The interposer has a trench and a through hole, which the trench exposes a portion of the sensing device, and the through hole exposes the conductive pad. The polymer adhesive supporting layer is interposed between the semiconductor chip and the interposer, and the redistribution layer is disposed on the interposer and in the through hole to be electrically connected to the conductive pad. The packaging layer covers the interposer and the redistribution layer, which the packaging layer has an opening exposing the trench.


