Polymer-Filled QFN and SON Dimples to Prevent Singulation Burrs
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Solution Overview
Problem
Conventional QFN and SON packages suffer from dimple burrs after singulation, which can impact solder joint reliability and require costly and time-consuming deburring processes, especially in fine pitch packages.
Innovation Solution
Incorporating a polymer material, such as polyimide, polyacrylate, or silicone, into the dimple of semiconductor packages to prevent burr formation during singulation, eliminating the need for additional deburring steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional singulation or saw processes are used, then semiconductor packages can be manufactured, but dimple burrs accumulate in the dimple affecting solder joint reliability
Solution Approach 1:
The patent applies preliminary action by forming a protective coating on the dimple surface before the singulation process. This coating prevents burr formation during cutting by protecting the dimple area from mechanical damage and material accumulation, thereby ensuring solder joint reliability without requiring post-processing deburring steps
Solution Approach 2:
The patent introduces an intermediary substance (protective coating) between the singulation process and the dimple surface. This coating acts as a mediator that prevents direct contact between the cutting tool and the dimple, eliminating burr accumulation while maintaining the integrity of the semiconductor package
2Reliability
If deburring processes are added to remove burrs, then solder joint reliability improves, but manufacturing time and cost increase
Solution Approach 1:
The patent eliminates the need for post-singulation deburring processes by implementing preliminary protective coating formation. This approach maintains solder joint reliability while avoiding the time-consuming and costly additional manufacturing steps that would otherwise be required
Solution Approach 2:
The patent extracts the deburring operation from the manufacturing process by preventing burr formation in the first place through the protective coating. This removes the need for separate deburring steps, thereby improving manufacturing efficiency without compromising product quality
3Length of moving object
If fine pitch QFN and SON packages are manufactured, then device miniaturization is achieved, but burr accumulation becomes more severe and deburring becomes geometrically impossible
Solution Approach 1:
The patent applies preliminary protective coating formation specifically targeted at the dimple area of fine pitch packages. This preventive measure is particularly effective for small geometries where post-processing deburring is impossible, allowing miniaturization to proceed without the compromising effect of burr accumulation
Solution Approach 2:
The patent applies local quality by providing targeted protection only to the dimple area where burr accumulation occurs. The protective coating is applied selectively to the specific location needing protection, allowing fine pitch packages to be manufactured without burrs while maintaining the overall miniaturized geometry
Data Source
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AI summary
Embodiments of the subject matter described herein relate semiconductor chip packages, and more specifically, to Quad Flat No-Lead (QFN) burr free dimple packages, Small Outline No-lead (SON) burr free and defect free dimple packages, and a process scheme for producing a burr free dimple after singulation without additional deburring processes.