Polymer-Filled QFN Dimple Structure for Burr-Free Singulation
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Solution Overview
Problem
Conventional QFN and SON semiconductor packages suffer from dimple burrs after singulation, which can impact solder joint reliability and require additional deburring processes that are time-consuming and costly, especially in fine pitch packages.
Innovation Solution
A semiconductor package design that includes a polymer material in the dimple, such as polyimide, polyacrylate, or silicone, with a thickness of at least 20 microns, to prevent burr formation during the singulation process, eliminating the need for additional deburring steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional singulation process is used, then manufacturing simplicity is maintained, but dimple burrs accumulate affecting solder joint reliability
Solution Approach 1:
The patent applies preliminary action by forming the dimple structure with controlled geometry and material properties before the singulation process. The dimple is designed with specific depth, diameter, and wall angle parameters that prevent burr formation during subsequent cutting operations, thereby preventing the harmful effect before it occurs.
Solution Approach 2:
The patent employs parameter changes by optimizing the dimple geometric parameters (depth, diameter, wall angle) and material parameters (polymer type, thickness) to prevent burr accumulation during singulation. These parameter adjustments transform the dimple structure to be inherently burr-free during the cutting process.
2Object-generated harmful factors
If additional deburring processes are implemented, then burr removal is achieved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent applies self-service by designing the dimple structure to automatically prevent burr formation during singulation through its specific geometric and material properties. The dimple acts as a self-contained feature that eliminates the need for external deburring processes, making the system self-sufficient in preventing defects.
Solution Approach 2:
The patent extracts the deburring function from the manufacturing process by incorporating burr prevention directly into the dimple design. This eliminates the need for separate deburring process steps, simplifying the overall manufacturing flow while maintaining effectiveness.
3Reliability
If dimples are used in fine pitch packages, then solder joint reliability can be improved, but burr accumulation becomes more severe
Solution Approach 1:
The patent applies local quality by tailoring the dimple parameters (depth, diameter, wall angle) specifically for fine pitch packages. The dimple structure is locally optimized with smaller dimensions and adjusted geometry to prevent burr accumulation in the constrained space of fine pitch packages, maintaining reliability without suffering from burr issues.
4Object-generated harmful factors
If polymer material is added to dimple, then burr prevention is achieved, but manufacturing complexity increases
Solution Approach 1:
The patent merges the polymer material application with the dimple formation process, combining multiple functions into a single integrated structure. The polymer layer is incorporated during the molding process itself, merging the dimple creation and burr prevention functions into one step, thereby minimizing the increase in manufacturing complexity.
Data Source
AI summary
Embodiments of the subject matter described herein relate semiconductor chip packages, and more specifically, to Quad Flat No-Lead (QFN) burr free dimple packages, Small Outline No-lead (SON) burr free and defect free dimple packages, and a process scheme for producing a burr free dimple after singulation without additional deburring processes.