Polymer Substrate for RF Switches Eliminates Harmonic Suppression
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Solution Overview
Problem
Conventional RFCMOS SOI technologies face nonlinearities due to high resistivity silicon handle wafers interfaced with buried oxide (BOX) dielectric regions, leading to complex and costly harmonic suppression processes, which are not effectively mitigated by existing solutions.
Innovation Solution
A semiconductor device with a polymer substrate having high thermal conductivity and electrical resistivity is used to replace the silicon wafer handle, eliminating the need for high resistivity silicon substrates and simplifying the process flow, while providing improved insulating characteristics and thermal management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high resistivity silicon substrates are used to maintain isolation between low voltage FETs, then electrical isolation is improved, but manufacturing complexity and cost increase due to required harmonic suppression processes
Solution Approach 1:
The patent changes the substrate material parameter from high resistivity silicon to polymer substrate, which inherently provides both high electrical resistivity and high thermal conductivity without requiring additional process steps. This parameter substitution resolves the contradiction by achieving electrical isolation through material selection rather than complex processing.
Solution Approach 2:
The patent replaces expensive high resistivity silicon substrates with cheaper polymer substrates that achieve the same electrical isolation function. The polymer substrate serves as a disposable or replaceable component that eliminates the need for costly harmonic suppression processes while maintaining device performance.
2Reliability
If high resistivity silicon handle wafers are used for device stacking, then carrier lifetime degradation is improved, but thermal management deteriorates due to low thermal conductivity
Solution Approach 1:
The patent employs a polymer substrate that combines two previously conflicting properties: high electrical resistivity (for carrier lifetime) and high thermal conductivity (for thermal management). This composite material approach resolves the contradiction by integrating both desirable characteristics into a single substrate material.
Solution Approach 2:
The patent fundamentally changes the thermal conductivity parameter of the substrate from low (silicon) to high (polymer), while maintaining adequate electrical resistivity. This parameter transformation allows simultaneous achievement of carrier lifetime degradation and effective thermal management.
3Reliability
If trap rich silicon/oxide interface is created to mitigate nonlinearities, then RF linearity is improved, but manufacturing complexity increases due to additional process steps
Solution Approach 1:
The patent extracts or removes the silicon/oxide interface that causes nonlinearities by replacing the silicon substrate with a polymer substrate. This elimination of the problematic interface achieves RF linearity improvement without requiring additional trap-rich layer formation processes.
Solution Approach 2:
The patent replaces the complex trap-rich interface structure with a simple polymer substrate that inherently provides linear RF characteristics. This substitution eliminates the need for costly and complex harmonic suppression process steps while achieving the same or better RF performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The polymer substrate enables RF switch devices with linear characteristics close to ideal, allowing for higher RF power levels, extended frequency operation, and reduced costs by eliminating the need for trap rich layers and harmonic suppression techniques.
Implementation Method 1
the polymer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK)
Implementation Method 2
an electrical resistivity of greater than 10 3[0005]An exemplary method includes providing a printed circuit substrate having the die attached to a top side of the printed circuit substrate, the die having at least one device layer over the printed circuit substrate, the BOX layer over the at least one device layer and a handle layer over the BOX layer. Another next step involves removing the wafer handle to expose the BOX layer. A following step includes disposing a polymer substrate having a thermal conductivity greater than 2 Watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 10 3[0006]Those skilled in the art will appreciate the scope of the disclosure and realize additional aspects thereof after reading the following detailed description in association with the accompanying drawings.
Data Source
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AI summary
A printed circuit module and methods for manufacturing the same are disclosed. The printed circuit module includes a printed circuit substrate with a thinned die attached to the printed circuit substrate. The thinned die includes at least one device layer over the printed circuit substrate and a buried oxide (BOX) layer over the at least one device layer. A polymer layer is disposed over the BOX layer, wherein the polymer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 103 Ohm-cm.