Polymer Wafer Handle for RF Switch Linearity

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Solution Overview

Problem

Conventional RFCMOS SOI technologies face nonlinearities due to high resistivity silicon handle wafers interfaced with buried oxide dielectric regions, leading to complex and costly process solutions that are not effectively mitigated, limiting the performance of RF power switches in 3G and 4G wireless applications.

Innovation Solution

A semiconductor device with a polymer wafer handle that is thermally conductive and electrically resistive, replacing the silicon wafer handle to eliminate nonlinearities and simplify the manufacturing process, allowing for improved RF switch performance and higher RF power handling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high resistivity silicon wafer handle is used, then electrical isolation between stacked FETs is improved, but RF device linearity deteriorates due to nonlinearities at the silicon/oxide interface

Engineering Contradiction:
Improveelectrical isolationVSAvoidRF nonlinearities
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent changes the material parameter of the wafer handle from high resistivity silicon to a different material system (such as silicon-on-plastic or alternative substrate configurations) that maintains the required electrical isolation properties while eliminating the nonlinear interface effects between high resistivity silicon and buried oxide, thereby improving RF linearity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structures, such as combining plastic substrates with silicon device layers or using multi-layer configurations, to achieve both electrical isolation and linear RF performance without the harmful nonlinearities associated with conventional high resistivity silicon handles

Inventive Principle:
Principle #40Composite materials

2Object-generated harmful factors

If trap rich silicon/oxide interface is introduced to mitigate nonlinearities, then RF linearity is improved, but device complexity and manufacturing cost increase

Engineering Contradiction:
ImproveRF nonlinearitiesVSAvoidprocess complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent extracts or removes the problematic high resistivity silicon handle material from the device structure, eliminating the source of nonlinearities at the silicon/oxide interface without requiring additional trap-rich interface engineering or complex harmonic suppression process steps

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the expensive and complex high resistivity silicon handle with a simpler, more cost-effective alternative substrate material that achieves the same electrical isolation function without the associated nonlinearities and complex processing requirements

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The polymer wafer handle enables RF switches with near-ideal linear characteristics, higher RF frequency operation, and reduced complexity and cost, overcoming the limitations of traditional silicon wafer handles by providing enhanced thermal management and electrical insulation.

Implementation Method 1

The polymer is thermally conductive and electrically resistive

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

The polymer is thermally conductive and electrically resistive

Methodology Applied
Scientific EffectElectrical resistance: Electrical Resistance

Data Source

PatentUS9214337B2Patterned silicon-on-plastic (SOP) technology and methods of manufacturing the same
Publication Date: 2015.12.15 QORVO US INC
  • US9214337B2 patent drawing
  • US9214337B2 patent drawing
  • US9214337B2 patent drawing

AI summary

A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a semiconductor stack structure attached to a wafer handle having at least one aperture that extends through the wafer handle to an exposed portion of the semiconductor stack structure. A thermally conductive and electrically resistive polymer substantially fills the at least one aperture and contacts the exposed portion of the semiconductor stack structure. One method for manufacturing the semiconductor device includes forming patterned apertures in the wafer handle to expose a portion of the semiconductor stack structure. The patterned apertures may or may not be aligned with sections of RF circuitry making up the semiconductor stack structure. A following step includes contacting the exposed portion of the semiconductor stack structure with a polymer and substantially filling the patterned apertures with the polymer, wherein the polymer is thermally conductive and electrically resistive.