Polynomial RAID Coding With SIMD LFSR for Multi-Drive Recovery
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Solution Overview
Problem
Existing error-correcting codes for RAID systems are limited in handling large numbers of drives and are computationally expensive, especially when dealing with multiple drive failures, leading to inefficiencies in encoding and decoding processes.
Innovation Solution
The use of polynomial codes and a linear feedback shift register (LFSR) for encoding and decoding, which enables efficient error correction and recovery by computing a faster solution matrix and reducing the number of constants needed from main memory, supporting up to 255 drives with improved reliability and cost-effectiveness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional Vandermonde encoding matrix is used for error-correcting codes, then the system can handle small numbers of drives (14 or fewer), but it cannot support large numbers of drives (up to 255) with efficient encoding and decoding
Solution Approach 1:
The patent changes the mathematical parameters of the encoding system by using LFSR-generated matrices with specific properties (based on primitive polynomials over GF(2^8)) instead of traditional Vandermonde matrices. This parameter change enables the system to support up to 255 drives while maintaining efficient encoding and decoding operations through the algebraic structure of LFSR sequences.
Solution Approach 2:
The patent replaces the traditional matrix multiplication approach (mechanical computation) with an LFSR-based sequential generation method. The LFSR uses shift register mechanics with feedback based on primitive polynomials to generate encoding matrices, which significantly speeds up both encoding and decoding operations while supporting larger numbers of drives.
2Reliability
If higher check disk count is used to increase reliability and decrease cost, then the system can withstand more drive failures and create larger groups, but the computational complexity and overhead increase
Solution Approach 1:
The LFSR-based encoding system is self-generating in the sense that the same LFSR structure used for encoding can be used for decoding by simply reversing the shift sequence. This self-service property eliminates the need for separate complex decoding algorithms, reducing computational complexity even as the number of check disks increases.
Solution Approach 2:
The LFSR generates sequences with periodic properties based on the order of the underlying finite field. This periodic action allows the system to handle larger numbers of drives and check disks by leveraging the cyclic nature of LFSR sequences, maintaining manageable computational complexity through the predictable periodic structure.
3Productivity
If polynomial codes with LFSR are used to support up to 255 drives, then the system achieves improved reliability and performance, but requires specialized encoding and decoding algorithms
Solution Approach 1:
The LFSR structure serves multiple functions: it generates encoding matrices, enables efficient encoding through shift operations, and provides the basis for decoding through reverse sequencing. This multi-functionality reduces the need for separate specialized algorithms for different operations, simplifying the overall system despite supporting 255 drives.
Solution Approach 2:
The LFSR acts as an intermediary between the raw data and the error-correcting code structure. By using the LFSR to generate the encoding matrices and intermediate sequences, the system bridges the gap between simple data storage and complex error correction, achieving high productivity while managing algorithmic complexity through this intermediate layer.
Data Source
AI summary
A system using accelerated error-correcting code in the storage and retrieval of data, wherein a single-instruction-multiple-data (SIMD) processor, SIMD instructions, non-volatile storage media, and an I/O controller implement a polynomial coding system including: a data matrix including at least one vector and including rows of at least one block of original data; a check matrix including more than two rows of at least one block of check data in the main memory; and a thread that executes on a SIMD CPU core and including: a parallel multiplier that multiplies the at least one vector of the data matrix by a single factor; and a parallel linear feedback shift register (LFSR) sequencer or a parallel syndrome sequencer configured to order load operations of the original data into at least one vector register of the SIMD CPU core and respectively compute the check data or syndrome data with the parallel multiplier.