Polyphase CFR Circuit for Low-Distortion Peak Cancellation
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Solution Overview
Problem
Existing crest factor reduction (CFR) techniques in integrated circuits face challenges in balancing cost, complexity, and performance, with high-performance methods being costly and low-cost methods offering lower performance, while simple clip-and-filter techniques distort signals due to excessive peaks in electrical signals.
Innovation Solution
A digital CFR arrangement using a polyphase digital filter with a first and second digital filter, where outputs are interleaved by a multiplexer, and additional components like clipping, inverting, and scaling circuits are used to introduce crest factor reduction, implementing a peak cancellation technique that reduces distortion and noise by pushing it out of the signal band.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If simple clip-and-filter techniques are used for crest factor reduction, then device complexity and cost are reduced, but signal distortion increases due to excessive peaks
Solution Approach 1:
The input signal is divided into even and odd samples that are processed by separate digital filters (first and second digital filters). This segmentation allows each filter to handle specific samples independently, reducing mutual interference and distortion while maintaining manageable complexity for each individual filter stage.
Solution Approach 2:
The outputs of the first and second digital filters are combined through a multiplexer that interleaves them to form the final output signal. This merging approach consolidates the processing results from both filter paths while maintaining the benefits of separate processing, achieving distortion reduction without proportionally increasing overall system complexity.
2Object-generated harmful factors
If high-performance CFR techniques are used, then signal distortion is reduced, but device complexity and cost increase
Solution Approach 1:
By segmenting the signal processing into two separate filter paths handling even and odd samples respectively, the invention achieves better distortion performance than single-filter approaches while keeping each individual filter's complexity manageable. The segmentation distributes the processing burden across multiple simpler stages.
Solution Approach 2:
The polyphase digital filter structure serves multiple functions: it performs crest factor reduction, filters even and odd samples separately, and enables parallel processing. This multi-functionality achieves high performance without proportionally increasing complexity, as the same filter architecture handles multiple processing tasks.
3Reliability
If polyphase digital filter with multiplexer is used, then crest factor reduction performance is improved, but device complexity increases compared to simple clip-and-filter
Solution Approach 1:
The signal stream is segmented into even and odd samples that are processed in parallel through separate filter paths. This segmentation enables better crest factor reduction performance by allowing independent optimization of each path while distributing the computational complexity across multiple simpler stages rather than one complex stage.
Solution Approach 2:
The multiplexer operates periodically, alternating between selecting outputs from the first digital filter (for even samples) and the second digital filter (for odd samples). This periodic switching structure achieves high performance through systematic alternating processing while maintaining regular, predictable timing that simplifies control logic and synchronization.
Data Source
AI summary
A crest factor reduction (CRF) circuit may include a scaler configured to receive the input signal and generate a scaled input signal. A clipping circuit may be configured to receive the input signal and generate a clipped input signal. A negator circuit may be configured to receive the clipped input signal and generate a negated clipped input signal. A first summer may be configured to sum the scaled input signal and the negated clipped input signal to generate a summed signal. A first digital filter may be configured to receive the summed signal and provide a first digital filter output. A second digital filter may be configured to receive the clipped input signal and provide a second digital filter output. A multiplexer may be configured to receive the first digital filter output and the second digital filter output and generate an output signal.