Polyphase PWM Edge Generation for Fine Modulation Resolution
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing PWM circuits are limited by their clock rate, which restricts the accuracy of pulse width modulation, particularly in applications requiring fine control, such as electronic stepper motors for precise positioning.
Innovation Solution
The implementation of a polyphase counter and comparator system that separates counter and comparator circuits into N parallel phases, allowing N counters to count and compare values in parallel, with a serializer converting these parallel signals into a high-speed serial stream, effectively increasing the modulation rate to N times the normal clock rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the clock rate of the counter and comparator circuit is increased to improve PWM modulation accuracy, then the tuning resolution and control precision are improved, but the device complexity and power consumption increase
Solution Approach 1:
The patent divides the counter and comparator circuit into N parallel phases, where each phase operates at a lower clock rate but collectively achieves an effective modulation rate of N times the clock rate. This segmentation allows the system to achieve high PWM modulation accuracy without requiring a single high-speed circuit, thereby reducing device complexity and power consumption while maintaining precision.
2Productivity
If the clock rate is increased to reduce the time period for modulation, then the productivity and control speed are improved, but the device complexity increases
Solution Approach 1:
The patent employs N parallel counter-comparator phases that operate simultaneously at a moderate clock rate. By distributing the modulation workload across N phases, the system achieves an effective productivity improvement of N times without requiring each individual circuit element to operate at proportionally higher speeds, thus avoiding the complexity penalties associated with high-speed design.
Solution Approach 2:
The patent transitions from a single-dimensional time-based modulation approach to a multi-dimensional parallel processing approach. By introducing N parallel phases that can be time-multiplexed or spatially distributed, the system achieves higher effective modulation speed without proportionally increasing the clock rate, thereby managing device complexity more effectively.
Data Source
AI summary
Techniques and an apparatus for producing pulse width modulation (PWM) edges are described. A PWM controller circuit with a polyphase counter is described. The polyphase counter may comprise a plurality of counters. Each of the counters may be set to a specific initial count value. A polyphase decoder block with a plurality of sets of high/low decoders are coupled to outputs from the polyphase counter. A set/reset block with a plurality of set/reset logic elements is coupled to outputs from the polyphase decoder block. A serializer is coupled to outputs from the plurality of set/reset blocks to generate PWM edges. Multiple parallel phases of a PWM pulse may be created with the circuit. Using a polyphase counter and comparator to create multiple parallel phases may speed up the controller circuit and provide a finer tuning resolution.