Polyphase Filter Phase Correction Using Quadrature Feedback
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Solution Overview
Problem
Conventional poly phase filters with multiple paths and adjustable delay circuits suffer from significant phase errors due to mismatches between paths.
Innovation Solution
A poly phase filter design with only the second and third paths equipped with adjustable delay circuits, coupled with a quadrature phase detector to control these circuits and generate clock signals with ideal phases, while the first and fourth paths lack adjustable delay circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If adjustable delay circuits are added to all paths to control phase, then phase control precision is improved, but device complexity and mismatch errors increase
Solution Approach 1:
The patent extracts the adjustable delay circuits from all paths and retains them only in the second and third paths. This selective removal reduces device complexity and the number of components while maintaining adequate phase control capability through the remaining adjustable delay circuits combined with phase detection and control logic.
Solution Approach 2:
The patent applies different configurations to different paths: the second and third paths have adjustable delay circuits for fine phase control, while the first and fourth paths use fixed delay structures. This local differentiation optimizes the overall system by placing complexity only where needed for phase adjustment.
2Measurement precision
If adjustable delay circuits are added to all paths to control phase, then phase control precision is improved, but mismatch errors increase
Solution Approach 1:
By removing adjustable delay circuits from the first and fourth paths, the patent eliminates the sources of mismatch errors that would arise from component variations. Fewer components mean fewer potential sources of manufacturing variability and phase errors.
Solution Approach 2:
The patent introduces a phase detector that monitors the phases of all four clock signals and provides feedback control. This feedback mechanism compensates for phase errors by adjusting the delay in the second and third paths, maintaining phase accuracy despite the reduced number of adjustable delay circuits.
Data Source
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AI summary
The present invention provides a filtering circuit comprising a poly phase filter and a quadrature phase detector. The poly phase filter comprises a first path, a second path, a third path and a fourth path. The first path is configured to receive a first input signal to generate a first clock signal. The second path comprising a first adjustable delay circuit is configured to receive the first input signal to generate a second clock signal. The third path comprising a second adjustable delay circuit is configured to receive a second input signal to generate a third clock signal. The fourth path is configured to receive the second input signal to generate a fourth clock signal. The quadrature phase detector is configured to detect phases of these clock signals to generate control signals to control the first adjustable delay circuit and the second adjustable delay circuit.