Polyphase Transform Noise-Shaping Crest Factor Reduction

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Solution Overview

Problem

Existing integrated circuit (IC) devices for noise-shaping crest factor reduction (NS-CFR) require significant circuit complexity due to the need for multiple digital down and up converters and multipliers for each channel, leading to inefficiencies as the number of channels or carriers increases.

Innovation Solution

A polyphase transformation-based approach that uses a delay, a waveform generator with a threshold and clip block, a polyphase transform block, a filter block, and an inverse polyphase transform block to reduce peak-to-average power ratio (PAPR) by converting clipping noise into spectrally translated components, filtering out original and distortion components, and recomposing a PAPR-reduced waveform.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional NS-CFR paths with digital down converters and digital up converters are used for each channel, then PAPR reduction is achieved, but device complexity increases linearly with the number of channels

Engineering Contradiction:
ImprovePAPR reductionVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the functionality of multiple separate NS-CFR paths into a single shared path. Instead of having N independent digital down converters and digital up converters (one per channel), the invention uses a single digital down converter followed by a polyphase filter bank that serves all N channels simultaneously. This combining approach reduces the overall circuit complexity from O(N) to O(log N) while maintaining PAPR reduction effectiveness across all channels.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The polyphase filter bank structure provides multi-functionality by handling multiple channels through a single processing path. The filter bank can process N different carrier signals simultaneously using a unified architecture, making the system universal rather than requiring dedicated processing circuits for each channel. This multi-functional approach eliminates the need for redundant converters and multipliers across different channels.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple digital down converters and digital up converters with multipliers are used for each channel, then noise-shaping crest factor reduction is achieved, but power consumption increases

Engineering Contradiction:
Improvenoise-shaping crest factor reductionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent combines multiple parallel processing paths into a single shared path, thereby reducing the total number of active circuit elements. By using one digital down converter and a polyphase filter bank that serves all channels simultaneously, the system reduces power consumption proportional to the reduction in circuit complexity. The unified architecture eliminates redundant power-hungry components like multiple sets of multipliers and converters that would be required for separate per-channel processing.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If conventional per-channel processing is used, then PAPR reduction is achieved for each channel, but the number of multipliers and circuit elements increases linearly

Engineering Contradiction:
ImprovePAPR reduction per channelVSAvoidnumber of multipliers
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments the signal processing into functional stages: a single digital down converter that processes all channels, followed by a polyphase filter bank that divides and processes each channel separately. This segmentation allows the system to maintain per-channel PAPR reduction capability while using a single set of multipliers and processing elements, reducing the total quantity from O(N) to O(log N).

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention merges the multiplier and converter resources across all channels by using a single digital down converter and polyphase filter bank structure. Instead of having N separate sets of multipliers and converters (one per channel), the system shares these resources through the polyphase decomposition, significantly reducing the total number of multipliers required while maintaining effective per-channel processing.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9503301B2Noise-shaping crest factor reduction with polyphase transforming
Publication Date: 2016.11.22 XILINX INC
  • US9503301B2 patent drawing
  • US9503301B2 patent drawing
  • US9503301B2 patent drawing

AI summary

Apparatus, system and method relates generally to data communication with noise-shaping crest factor reduction using polyphase transformation. In such a method, a composite signal is received by a delay and a waveform generator. The waveform generator is for noise-shaping crest factor reduction using polyphase transformation. The composite signal is delayed by the delay to provide a delayed composite signal. A waveform is generated by the waveform generator from the composite signal. The waveform is output from the waveform generator having clipping noise with respect to bands of corresponding carriers of the composite signal. The waveform is subtracted from the delayed version of the composite signal for peak-to-amplitude power ratio reduction. A reduced peak version of the delayed version of the composite signal delayed is output from the signal combiner.