Polysilazane Deposition for Void-Free Trench Isolation

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Solution Overview

Problem

The reaction of trisilylamine, oxygen, and ammonia gas under plasma treatment in shallow trench isolation processes for semiconductor wafers often results in defects such as voids, leading to electrical isolation failures, especially for nano-scale line widths.

Innovation Solution

A method involving the deposition of polysilazane on semiconductor wafers, where silazane is dissolved in a solvent like ammonia, applied at controlled cooling temperatures, and then heated to form a void-free polysilazane layer, which is subsequently converted into oxide, ensuring full trench filling without defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If plasma treatment is used to form polysilazane from trisilylamine, oxygen, and ammonia gas, then the polysilazane layer can be formed with good flowability over oxide, but voids and defects occur in the polysilazane layer

Engineering Contradiction:
Improveflowability of polysilazaneVSAvoiddefect-free polysilazane layer
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent extracts the harmful plasma treatment step from the polysilazane formation process. Instead of using plasma to form polysilazane from trisilylamine, oxygen, and ammonia gas, the invention uses a different approach: forming a silicon nitride layer first, then converting it to polysilazane through chemical vapor deposition with silane and ammonia, eliminating the violent plasma reaction that causes voids while maintaining good flowability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary silicon nitride layer as a intermediate step between the substrate and the final polysilazane layer. This silicon nitride layer serves as a mediator that can be converted to polysilazane through a controlled chemical process, avoiding the direct violent plasma reaction between trisilylamine, oxygen, and ammonia gas that causes defects

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If conventional plasma treatment is used for polysilazane formation, then the process can be completed in a single step, but voids and defects are unavoidable

Engineering Contradiction:
Improvesingle-step process efficiencyVSAvoidisolation reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the polysilazane formation process into multiple controlled steps: first forming a silicon nitride layer, then converting it to polysilazane through chemical vapor deposition. This segmentation allows each step to be optimized independently, ensuring void-free formation while maintaining overall process efficiency, particularly for narrow trench structures

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary action by forming a silicon nitride layer before converting it to polysilazane. This preliminary silicon nitride layer provides a stable foundation that can be uniformly converted to polysilazane, preventing void formation and ensuring reliable isolation, especially for nanometer-scale line widths

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach prevents voids in the polysilazane layer, enabling reliable electrical isolation for nano-scale trench structures, improving the yield rate and insulation quality in semiconductor manufacturing.

Implementation Method 1

heating the silazane to form the polysilazane on the semiconductor wafer

Methodology Applied
Scientific EffectEvaporation: Evaporation

Implementation Method 2

the polysilazane is converted into oxide

Methodology Applied
Scientific EffectThermal decomposition: Pyrolysis

Data Source

PatentUS8796105B2Method and apparatus for preparing polysilazane on a semiconductor wafer
Publication Date: 2014.08.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8796105B2 patent drawing
  • US8796105B2 patent drawing
  • US8796105B2 patent drawing

AI summary

A method for depositing a polysilazane on a semiconductor wafer is provided. The method includes steps of disposing a silazane onto the semiconductor wafer, and heating the silazane to form the polysilazane on the semiconductor wafer. An apparatus for preparing a polysilazane on a semiconductor wafer is also provided.