Polysilicon Cap Shallow Trench Isolation Leakage
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Solution Overview
Problem
Conventional shallow trench isolation (STI) processes suffer from divot or oxide loss near the top corners of the trench during etching and cleaning steps, leading to sub-threshold leakage current issues, particularly exacerbated in embedded memory processes like e-flash due to additional etching and cleaning steps.
Innovation Solution
A method is introduced where a polysilicon cap is formed over the insulation layer within the trench to protect the top corners from damage during subsequent etching and cleaning processes, preventing divot formation and enhancing isolation capability by reducing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional STI process is used, then trench isolation is formed, but divot or oxide loss occurs near top corners during etching and cleaning steps
Solution Approach 1:
A polysilicon layer is deposited conformally over the insulation layer before subsequent etching and cleaning steps. This preliminary deposition of the polysilicon cap layer protects the insulation layer from divot formation and oxide loss during later processing steps, particularly during trench filling and planarization operations.
Solution Approach 2:
The polysilicon layer acts as an intermediary protective layer between the insulation layer and the harsh etching/cleaning environment. It serves as a sacrificial or protective barrier that prevents direct exposure of the insulation layer to damaging processes, thereby maintaining oxide integrity at critical corner regions.
2Adaptability or versatility
If extra etching and cleaning steps are added for embedded memory process, then memory device fabrication is enabled, but divot or oxide loss problem becomes more serious
Solution Approach 1:
The polysilicon cap layer is deposited in advance before the additional etching and cleaning steps required for embedded memory fabrication. This preliminary protective layer remains in place throughout the extra processing steps, preventing oxide loss that would otherwise be exacerbated by the additional process steps.
3Reliability
If polysilicon cap is formed over insulation layer, then divot prevention is achieved, but process complexity increases
Solution Approach 1:
The polysilicon layer is deposited conformally using standard CVD processes already present in the fabrication sequence. The same polysilicon material is used both as a protective cap layer and as the final trench fill material, eliminating the need for separate protective layer deposition and removal steps. This self-service approach integrates the protective function into existing process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The polysilicon cap effectively prevents oxide loss and improves the isolation performance of STI structures, reducing leakage current and maintaining a smooth topography, which is beneficial for both logic and memory device fabrication.
Implementation Method 1
A polysilicon layer is formed over the substrate to cover the masking layer and the insulation layer
Implementation Method 2
A plurality of trenches in the substrate is formed by performing an etching process using the patterned photoresist layer as a mask
Implementation Method 3
An insulation layer is formed over the substrate to fill the trenches in the substrate
Data Source
AI summary
A semiconductor structure includes: a substrate with at least a trench therein, wherein the trench is filled with an insulation layer; a first polysilicon layer disposed on the insulation layer and covering at least two opposite borders of a top surface of the insulation layer; a second polysilicon layer disposed above the first polysilicon layer and the substrate; and a dielectric layer disposed between the first and second polysilicon layers, wherein the first and second polysilicon layers are respectively shaped as first and second strips.