Polysilicon Contact Impurity Diffusion Prevention
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Solution Overview
Problem
As semiconductor devices miniaturize, impurities in polysilicon layers, such as arsenic and phosphorus, diffuse during manufacturing, leading to deteriorated electrical properties and issues like leakage and refresh problems in DRAM devices.
Innovation Solution
Incorporating an impurity-diffusion prevention layer in polysilicon layers, using materials like carbon, nitrogen, and oxygen, to prevent impurities from diffusing into insulating layers and semiconductor substrates, thereby maintaining the integrity of electrical properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If polysilicon layer is doped with impurities to improve conductivity, then electrical conductivity is improved, but impurity diffusion occurs causing deterioration of electrical properties
Solution Approach 1:
A silicon oxide layer is introduced as an intermediary barrier between the doped polysilicon layer and the underlying structures. This oxide layer prevents impurity diffusion while maintaining electrical conductivity, resolving the contradiction between needing doped polysilicon for conductivity and preventing impurity migration that deteriorates electrical properties.
Solution Approach 2:
The invention uses a composite structure combining polysilicon and silicon oxide layers. The polysilicon provides conductivity through doping, while the silicon oxide layer prevents impurity diffusion. This composite approach allows both functions to coexist without mutual interference.
2Productivity
If device size is decreased to increase integration density, then productivity is improved, but electrical properties deteriorate due to increased impurity diffusion
Solution Approach 1:
The silicon oxide layer serves as a diffusion barrier that becomes increasingly important as device dimensions shrink. By preventing impurity diffusion, it maintains electrical property integrity even when devices are miniaturized to achieve higher integration density.
Solution Approach 2:
The invention applies localized quality control by introducing the silicon oxide layer specifically at interfaces where impurity diffusion occurs. This targeted approach prevents deterioration of electrical properties in critical regions while allowing device miniaturization elsewhere to improve integration density.
3Reliability
If impurity concentration in polysilicon layer is increased to improve contact quality, then contact quality is improved, but leakage increases due to impurity diffusion into insulating layer
Solution Approach 1:
The silicon oxide layer acts as a mediator that allows high impurity concentration in the polysilicon layer to improve contact quality while preventing those impurities from diffusing into the insulating layer and creating leakage paths. The oxide barrier isolates the doped region from adjacent structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The impurity-diffusion prevention layer effectively prevents impurity diffusion, enhancing the electrical properties and contact quality of semiconductor devices, including DRAM, by reducing leakage and improving refresh performance.
Implementation Method 1
an impurity-diffusion prevention layer that is configured to prevent impurities included in the polysilicon layer from diffusing into the insulating layer and into the semiconductor substrate
Data Source
AI summary
Provided are semiconductor devices including a semiconductor substrate, an insulating layer including a contact hole through which the semiconductor substrate is exposed, and a polysilicon layer filling the contact hole. The polysilicon layer is doped with impurities and includes an impurity-diffusion prevention layer. In the semiconductor devices, the impurities included in the polysilicon layer do not diffuse into the insulating layer and the semiconductor substrate due to the impurity-diffusion prevention layers.


