Low Temperature Polysilicon Layer Edge Thickness Control
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Solution Overview
Problem
Current low temperature polysilicon technologies face issues with increased mask requirements and production cycles due to light shielding layer processes, and are prone to photo-induced leakage current, affecting display performance with issues like crosstalk and contrast reduction.
Innovation Solution
A method for manufacturing a low temperature polysilicon layer involving a substrate with buffer layers, patterning to form channel and doped regions, and using an island-shaped photoresist layer with halftone masks to reduce edge thicknesses and minimize photon absorption, thereby reducing photo-induced leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If a light shielding layer is added to reduce photo-induced leakage current, then photo-induced leakage current is reduced, but the number of masks required increases and production cycle is extended
Solution Approach 1:
The patent extracts and removes the light shielding layer from the thin film transistor structure. By eliminating this layer along with its associated mask process, the invention reduces the total number of masks from 7-9 to 5-6 while maintaining acceptable photo-induced leakage current performance through alternative structural designs of the polysilicon layer
Solution Approach 2:
The invention merges the light shielding function into the polysilicon layer structure itself through specific thickness variations and doping configurations. The polysilicon layer is designed with different thicknesses in different regions (thinner at edges, thicker in center) to provide both structural function and optical control, eliminating the need for a separate light shielding layer
2Object-generated harmful factors
If a light shielding layer is added to reduce photo-induced leakage current, then photo-induced leakage current is reduced, but production cycle is extended
Solution Approach 1:
The patent extracts and removes the light shielding layer from the thin film transistor structure. By eliminating this layer along with its associated mask process, the invention reduces the total number of masks from 7-9 to 5-6 while maintaining acceptable photo-induced leakage current performance through alternative structural designs of the polysilicon layer
Solution Approach 2:
The invention performs preliminary optimization of the polysilicon layer structure during the main fabrication process. By pre-designing the polysilicon layer with specific thickness variations and doping profiles, the light shielding function is built-in from the start, eliminating the need for subsequent light shielding layer deposition and mask processes that would extend the production cycle
3Ease of manufacture
If the polysilicon layer has uniform thickness, then manufacturing is simpler, but photo-induced leakage current is excessive
Solution Approach 1:
The patent applies local quality by creating non-uniform thickness distribution within the polysilicon layer. The layer is designed with thinner regions at the edges and thicker regions in the center, with each region having different thickness optimized for its specific function. This local variation reduces photon absorption in critical areas while maintaining structural integrity and electrical performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of masks needed, shortens production cycles, and decreases photo-induced leakage current, enhancing display performance by minimizing photon absorption and recombination of electron-hole pairs.
Implementation Method 1
the island-shaped photoresist layer is exposed and developed by a halftone mask to form the island-shaped photoresist layer, the halftone mask has an opaque region and a light transmissive region
Implementation Method 2
etching the edge of the channel region and at least one portion of the low doped regions such that thicknesses of the edge of the channel region and the at least one portion of the low doped regions are less than a thickness of another position of the polysilicon layer
Data Source
AI summary
A low temperature polysilicon layer, a thin film transistor, and a method for manufacturing same are provided. The low temperature polysilicon layer includes a substrate, at least one buffer layer, and a polysilicon layer. The polysilicon layer is disposed on the at least one buffer layer. The polysilicon layer includes a channel region, two low doped regions disposed on two sides of the channel region, and two high doped regions disposed on an outer side of the low doped regions. Thicknesses of an edge of the channel region and at least one portion of the low doped regions are less than a thickness of another position of the polysilicon layer.


