Polysilicon Emitter Interfacial Oxide Thickness Control
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Solution Overview
Problem
Existing methods for forming an interfacial oxide layer in polysilicon emitter transistors are inefficient and prone to variations, leading to inconsistent current gain and emitter resistance, due to reliance on ambient conditions and complex equipment setups.
Innovation Solution
A method involving deliberate thermal oxidation in a controlled low-pressure, low-temperature pure oxygen environment, where the oxidation process is precisely managed by adjusting pressure, temperature, and time to consistently form a controlled interfacial oxide layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If deliberate thermal oxidation is performed in a controlled low-pressure, low-temperature pure oxygen environment, then manufacturing precision of interfacial oxide thickness is improved, but device complexity increases
Solution Approach 1:
The patent applies parameter changes by controlling oxidation in a low-pressure (1-100 mTorr), low-temperature (400-600°C), pure oxygen environment. This combination of specific parameter ranges enables precise control of interfacial oxide thickness while minimizing oxidation rate variations, directly resolving the technical contradiction between manufacturing precision and device complexity.
Solution Approach 2:
The patent introduces an intermediary controlled environment (low-pressure pure oxygen chamber) between the wafer and ambient atmosphere. This intermediary environment acts as a mediator that enables precise oxidation control by eliminating ambient moisture and oxygen variability, thereby achieving consistent interfacial oxide formation without requiring complex external control systems.
2Manufacturing precision
If oxidation rate is reduced through controlled environment, then manufacturing precision is improved, but productivity decreases
Solution Approach 1:
The patent changes the oxidation parameters by performing oxidation at low pressure (1-100 mTorr) and low temperature (400-600°C) in pure oxygen. This parameter transformation reduces the oxidation rate to a controllable level, enabling precise thickness control. The low-pressure environment specifically slows down oxidation kinetics while maintaining process control, resolving the contradiction between precision and productivity.
3Reliability
If ambient atmosphere control is implemented to prevent oxidation variations, then reliability is improved, but device complexity and cost increase
Solution Approach 1:
The patent creates an inert-like controlled environment by using pure oxygen at low pressure (1-100 mTorr) during oxidation. This controlled atmosphere acts as an inert environment that eliminates ambient moisture and variable oxygen concentrations, ensuring consistent oxidation results. The low-pressure pure oxygen environment provides reliability without requiring complex ambient atmosphere control equipment.
Solution Approach 2:
The patent introduces a low-pressure pure oxygen environment as an intermediary between the wafer and ambient atmosphere. This intermediary layer prevents direct exposure to variable ambient conditions, thereby ensuring oxidation consistency. The intermediary controlled environment achieves reliability improvement without implementing complex ambient control equipment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces oxidation rate variations, allowing for precise control of interfacial oxide thickness and current gain, improving transistor performance with consistent results across multiple tests.
Implementation Method 1
growing an interfacial oxide layer on the monocrystalline silicon layer in a controlled low-pressure, low-temperature pure oxygen (O2) environment
Data Source
AI summary
A method is disclosed for controlling the formation of an interfacial oxide layer in a polysilicon emitter transistor device. The interfacial oxide layer is formed between an underlying substrate of single crystal silicon and an upper layer of polysilicon. The current gain and the emitter resistance of the transistor device are related to the thickness of the interfacial oxide layer. The oxide of the interfacial oxide layer is grown in a low pressure, low temperature pure oxygen (O2) environment that greatly reduces the oxidation rate. The low oxidation rate allows the thickness of the interfacial oxide layer to be precisely controlled and sources of variation to be minimized in the manufacturing process.