Polysilicon Etch Density Control via Dummy Regions
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Solution Overview
Problem
Existing integrated circuit fabrication processes face challenges in controlling the etch-pattern density of polysilicon layers, leading to non-uniform etching rates and dimensions, which affect the performance and yield of CMOS devices.
Innovation Solution
The method involves depositing a polysilicon layer on a semiconductor wafer, determining etch regions within circuit-device areas, calculating the etch area, and adding additional etch regions in non-circuit-device areas to ensure the etch area exceeds a minimum threshold, allowing for controlled etching of both areas to improve uniformity and precision.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If additional etch regions are added in non-circuit-device areas to increase etch area, then etch-pattern density uniformity is improved, but device complexity increases
Solution Approach 1:
The wafer surface is divided into circuit-device areas and non-circuit-device areas, with etch regions selectively added in non-circuit areas. This segmentation allows the etch pattern density to be increased without affecting the actual device structures, resolving the contradiction between improving etch uniformity and avoiding device complexity increase.
2Measurement precision
If etch area is increased by adding regions in non-circuit-device areas, then signal-to-noise ratio for process control is improved, but manufacturing time increases
Solution Approach 1:
Additional etch regions are pre-planned and positioned in non-circuit-device areas before the etching process begins. This preliminary action ensures that the etch pattern density is optimized for measurement precision without requiring additional processing steps or extending manufacturing time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the uniformity of etched dimensions, improves the signal-to-noise ratio for automated process control, and increases the detectability of reaction products, resulting in higher-yielding circuits with tighter specifications and lower manufacturing costs.
Implementation Method 1
Thin film deposition of polysilicon is used in the manufacture of some integrated circuits
Implementation Method 2
Thin film deposition of polysilicon is used in the manufacture of some integrated circuits
Implementation Method 3
etching the polysilicon from the polysilicon-etch regions in both the circuit-device areas and the non-circuit-device areas
Data Source
AI summary
A method of controlling an etch-pattern density of a polysilicon layer includes depositing polysilicon on a wafer. The method includes determining polysilicon-etch regions that include DMOS source regions within circuit-device areas of the wafer. The method includes calculating an etch area of the polysilicon-etch regions and then comparing the calculated etch area of the polysilicon-etch regions to a predetermined minimum etch area. If the calculated etch area is less than a predetermined threshold, the method adds polysilicon-etch regions within non-circuit-device areas to the determined polysilicon-etch regions within the circuit-device areas until the comparing step results in the calculated etch area of the polysilicon-etch regions being greater than the predetermined minimum etch area. The method includes etching the polysilicon from the polysilicon-etch regions in both the circuit-device areas and the non-circuit-device areas. Adding polysilicon-etch regions in non-circuit device areas can advantageously facilitate automatic process control of an etch step.