Polysilicon Field Plate Layout for Higher Breakdown Voltage
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Solution Overview
Problem
Existing diffusion-type semiconductor devices require multiple manufacturing processes to achieve a gradual change in the capacitance value of the field plate capacitor, leading to increased costs and difficulty in mass production.
Innovation Solution
A semiconductor device design with a polysilicon gate projected onto a drift region featuring at least two gate regions with different doping concentrations, allowing the equivalent electrical thickness of the insulating layer in the field plate capacitor to gradually increase, thereby improving breakdown voltage without additional manufacturing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate oxide layer is configured as multiple steps to achieve gradual change in capacitance value, then the breakdown voltage is improved, but the number of manufacturing processes increases and mass production becomes difficult
Solution Approach 1:
The patent applies local quality by configuring the gate oxide layer with different thicknesses in different regions (first thickness in the first region, second thickness in the second region) to achieve gradual capacitance change. This localized variation in oxide layer properties enables the desired electrical performance without requiring multiple discrete manufacturing steps, thus resolving the contradiction between improved breakdown voltage and manufacturing complexity.
2Reliability
If the gate oxide layer is configured as a step structure to vary capacitance value, then the field plate capacitor performance is improved, but the manufacturing cost increases
Solution Approach 1:
The patent implements local quality by creating regions with different gate oxide layer thicknesses within a single continuous layer structure. This approach achieves the required field plate capacitor performance through localized thickness variation rather than multiple separate layers, thereby reducing manufacturing steps and associated costs while maintaining the necessary electrical characteristics.
3Reliability
If multiple gate oxide layer steps are used to achieve linear capacitance variation, then the electrical performance is improved, but the device complexity increases
Solution Approach 1:
The patent reduces device complexity by implementing a gate oxide layer with only two distinct thickness regions rather than multiple steps. This simplified structure achieves the necessary linear capacitance variation through the transition between the first and second regions, thereby improving electrical performance while keeping the overall device structure less complex and more manufacturable.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances breakdown voltage while maintaining cost-effectiveness by reducing the number of manufacturing processes, thus facilitating mass production.
Implementation Method 1
the portion of the polysilicon gate that is projected onto the drift region comprises at least two gate regions having different doping concentrations; and while the semiconductor device is operating, in a direction from an end of the drift region near the well region approaching the drain region, an equivalent electrical thickness of an insulating layer disposed in a field plate capacitor
Data Source
AI summary
A semiconductor device includes: a semiconductor substrate, a gate oxide layer, and a polysilicon field plate. The semiconductor substrate includes a drift region and a well region. An end of the drift region is arranged with a drain region, and an end of the well region is arranged with a source region. The gate oxide layer is arranged on the semiconductor substrate and disposed between the source region and the drain region. The polysilicon field plate is arranged on the gate oxide layer. At least a portion of the polysilicon field plate is projected onto the drift region and includes at least two field-plate regions. While the semiconductor device is operating, in a direction from an end of the drift region near the well region approaching the drain region, an equivalent electrical thickness of an insulating layer between the polysilicon field plate and the drift region gradually increases.