Polysilicon Gate Stack Doping Without Gate Dielectric Penetration

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Solution Overview

Problem

Increasing dopant concentration in semiconductor devices to enhance net doping while preventing dopant penetration into the gate dielectric layer, which is detrimental to the device's characteristics, is a challenge as higher doping energy and dose can lead to dopant penetration, affecting gate resistance and controllability.

Innovation Solution

A semiconductor device structure is developed with a stack of carbon-undoped and carbon-doped polysilicon layers, where the carbon-doped layer is doped with a dopant, and an interface oxide is formed to prevent dopant penetration into the gate dielectric layer, allowing for increased doping concentration without damaging the gate stack.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If doping energy and doping dose are increased to increase net doping in the polysilicon layer, then net doping is improved, but dopant penetration into the gate dielectric layer occurs which deteriorates gate stack characteristics

Engineering Contradiction:
Improvenet doping concentrationVSAvoiddopant penetration into gate dielectric layer
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

An interface oxide layer is introduced as an intermediary barrier between the polysilicon layer and the gate dielectric layer. This oxide layer prevents dopant atoms from penetrating into the gate dielectric while allowing the doping process to proceed with high energy and dose to achieve the desired net doping concentration in the polysilicon layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The gate stack is segmented into distinct layers with the interface oxide layer positioned between the polysilicon layer and the gate dielectric layer. This segmentation creates a physical barrier that stops dopant migration while maintaining the electrical functionality of the gate stack.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If dopant concentration is increased to reduce gate resistance, then gate resistance is reduced, but dopant penetration into the gate dielectric layer occurs which deteriorates gate controllability

Engineering Contradiction:
Improvedopant concentrationVSAvoidgate controllability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The interface oxide layer serves as a protective intermediary that enables high dopant concentration in the polysilicon layer to reduce gate resistance while preventing dopant contamination of the gate dielectric layer, thereby maintaining gate controllability and device reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Quantity of substance

If doping dose is increased to improve net doping, then net doping is improved, but harmful dopant penetration into the gate dielectric layer occurs

Engineering Contradiction:
Improvenet dopingVSAvoiddopant penetration into gate dielectric layer
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The interface oxide layer is formed in advance before the doping process. This preliminary protective layer is already in place to prevent dopant penetration when high doping doses are applied to achieve the desired net doping level in the polysilicon layer.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively increases net doping in the semiconductor device while maintaining the integrity of the gate dielectric layer, reducing resistance and improving gate controllability.

Implementation Method 1

forming an interface oxide material by oxidizing the surface of the carbon-doped polysilicon layer

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

performing annealing to activate the dopant

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS11784051B2Semiconductor device and method for fabricating the same
Publication Date: 2023.10.10 SK HYNIX INC
  • US11784051B2 patent drawing
  • US11784051B2 patent drawing
  • US11784051B2 patent drawing

AI summary

A method for fabricating a semiconductor device may include: forming a gate dielectric material over a substrate; sequentially forming a carbon-undoped polysilicon layer and a carbon-doped polysilicon layer over the gate dielectric material; doping the carbon-doped polysilicon layer with a dopant; forming a columnar crystalline polysilicon layer over the carbon-doped polysilicon layer doped with the dopant; and performing annealing to activate the dopant.