Polysilicon Gate Etching Uniformity via Isotropic Plasma
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Solution Overview
Problem
The existing methods for forming semiconductor gates and shallow trench isolation regions face challenges in achieving uniform etching, leading to roughness on sidewalls and surfaces, which affects the precision of critical dimensions and electrical properties.
Innovation Solution
The method involves performing an isotropic plasma etching process using a mixture of fluorine-based gases and oxygen, followed by a wet cleaning process, to form a temporary protective film that reduces height differences on convex and concave surfaces, thereby improving etching uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching methods are used to form gates and shallow trenches, then the manufacturing process is simple, but the etching uniformity is poor leading to roughness on sidewalls and surfaces
Solution Approach 1:
The etching process is divided into multiple sequential steps: first etching to form the basic structure, then performing additional etching on convex portions, and finally planarizing the surface. This segmentation allows each step to address specific uniformity issues rather than attempting to achieve perfect uniformity in a single step.
Solution Approach 2:
The method performs preliminary etching to form the basic gate or shallow trench structure before addressing the roughness issues. The convex portions are then selectively removed in a subsequent step, and the surface is planarized. This preliminary action establishes the foundation that is later refined to achieve uniformity.
2Manufacturing precision
If single-step etching is used, then the manufacturing process is fast, but the sidewall roughness affects critical dimension control
Solution Approach 1:
The etching process is divided into multiple sequential steps: first etching to form the basic structure, then performing additional etching on convex portions, and finally planarizing the surface. This segmentation allows each step to address specific uniformity issues rather than attempting to achieve perfect uniformity in a single step.
Solution Approach 2:
The method performs preliminary etching to form the basic gate or shallow trench structure before addressing the roughness issues. The convex portions are then selectively removed in a subsequent step, and the surface is planarized. This preliminary action establishes the foundation that is later refined to achieve uniformity.
3Manufacturing precision
If shallow trench etching is performed without surface planarization, then the process is simple, but the filling quality of subsequent spacers is poor
Solution Approach 1:
The method performs preliminary etching to form the basic gate or shallow trench structure before addressing the roughness issues. The convex portions are then selectively removed in a subsequent step, and the surface is planarized. This preliminary action establishes the foundation that is later refined to achieve uniformity.
Solution Approach 2:
The etching process selectively targets convex portions of the surface for removal while preserving concave portions. This local quality approach ensures that only the areas needing correction are modified, achieving uniformity without unnecessary processing of already-flat areas.
4Reliability
If non-uniform etching is used, then the etching process is fast, but the electrical properties of the shallow trench isolation region are degraded
Solution Approach 1:
The etching process is divided into multiple sequential steps: first etching to form the basic structure, then performing additional etching on convex portions, and finally planarizing the surface. This segmentation allows each step to address specific uniformity issues rather than attempting to achieve perfect uniformity in a single step.
Solution Approach 2:
The etching process selectively targets convex portions of the surface for removal while preserving concave portions. This local quality approach ensures that only the areas needing correction are modified, achieving uniformity without unnecessary processing of already-flat areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the uniformity of gate sidewalls and shallow trench surfaces, improving the precision of gate width and trench depth, and subsequently enhances the filling quality and electrical properties of the semiconductor devices.
Implementation Method 1
performing an isotropic plasma etching process on the etched polysilicon layer by using a mixed gases containing a fluorine-based gas and oxygen gas
Implementation Method 2
performing an isotropic plasma etching process on the etched polysilicon layer by using a mixed gases containing a fluorine-based gas and oxygen gas
Implementation Method 3
cleaning the semiconductor substrate subjected to the isotropic plasma etching process
Data Source
AI summary
A method for forming a gate, which can improve the etching uniformity of the sidewalls of the gate, includes the following steps: forming a dielectric layer on a semiconductor substrate; forming a polysilicon layer on the dielectric layer; etching the polysilicon layer; performing an isotropic plasma etching process on the etched polysilicon layer by using a mixed gases containing a fluorine-based gas and oxygen gas; and cleaning the semiconductor substrate subjected to the isotropic plasma etching process, thereby forming a gate. The present invention further provides a method for forming a shallow trench isolation region, which can improve the filling quality of a subsequent spacer and the electrical properties of the resultant shallow trench isolation region, and a method for planarizing an etched surface of silicon substrate, which can improve the etching uniformity of the surface of silicon substrate.