Polysilicon Gate Height Control via Stop Layer Etch Selectivity

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Solution Overview

Problem

The semiconductor industry faces challenges in manufacturing integrated circuits (ICs) due to uneven polysilicon layer thickness caused by non-uniform pattern densities, leading to undesirable 'loading effects' that affect the IC manufacturing process.

Innovation Solution

A method is introduced to achieve equal gate heights across different regions of ICs by depositing a first polysilicon layer, a stop layer with modified etch selectivity, and a second polysilicon layer, followed by planarization and etching to ensure a uniform surface, allowing for the formation of polysilicon gate structures with consistent heights regardless of pattern densities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional lithography and patterning techniques are used to form semiconductor devices, then functional density can be increased while feature size decreases, but non-uniform pattern densities cause loading effects that lead to uneven polysilicon layer thickness

Engineering Contradiction:
Improvepolysilicon layer thickness uniformityVSAvoidpattern density variation
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

A stop layer is introduced as an intermediary between the first polysilicon layer and the second polysilicon layer. This stop layer has modified etch selectivity relative to the polysilicon layers, allowing it to act as a reference plane during etching processes. The stop layer compensates for underlying topography variations caused by non-uniform pattern densities, enabling uniform gate heights to be achieved despite variations in the substrate and first polysilicon layer thickness.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The etch selectivity parameter of the stop layer is modified through doping or material composition changes. By adjusting the etch selectivity of the stop layer relative to the polysilicon layers, the etching process can selectively remove excess polysilicon while stopping at the stop layer interface, thereby achieving uniform gate heights across regions with different pattern densities.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If multiple polysilicon layers are deposited to compensate for loading effects, then gate height uniformity can be improved, but the manufacturing process complexity increases

Engineering Contradiction:
Improvegate height uniformityVSAvoidmanufacturing process steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The stop layer serves as a mediator that simplifies the overall process by providing a stable reference plane. Instead of requiring complex real-time adjustments during polysilicon deposition, the stop layer allows standard deposition and etching processes to achieve uniform results, effectively reducing process complexity while maintaining high precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The stop layer is deposited and its etch selectivity is modified in advance, before the final polysilicon layers are formed. This preliminary preparation creates a controlled reference structure that guides subsequent processing steps, making the overall manufacturing process more predictable and easier to control compared to attempting to compensate for loading effects during the actual gate formation.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures uniform gate heights and planar surfaces, facilitating consistent IC performance, easier layer formation, and successful gate replacement processes, thereby improving manufacturing efficiency and accuracy.

Implementation Method 1

treating the stop layer to change its etch selectivity relative to the first polysilicon layer

Methodology Applied
Scientific EffectEtch selectivity modification:

Implementation Method 2

forming a first polysilicon layer, a stop layer and a second polysilicon layer sequentially over a substrate

Methodology Applied
Scientific EffectPlanarization:

Data Source

PatentUS9412666B2Equal gate height control method for semiconductor device with different pattern densites
Publication Date: 2016.08.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9412666B2 patent drawing
  • US9412666B2 patent drawing
  • US9412666B2 patent drawing

AI summary

A method of forming a semiconductor integrated circuit (IC) includes forming a first semiconductor layer over a substrate, the first semiconductor layer having an uneven upper surface, forming a stop layer over the first semiconductor layer, the first semiconductor layer disposed between the substrate and the stop layer, and treating the stop layer to change its etch selectivity relative to the first semiconductor layer.