Polysilicon Gate Planarization via Oxide Interlayer
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Solution Overview
Problem
The uneven surface of polysilicon gates in semiconductor manufacturing leads to issues in subsequent processes, particularly during SiGe epitaxial growth, where protuberances cause thickness uniformity problems and require removal through chemical mechanical polishing, which affects the overall wafer thickness.
Innovation Solution
A method involving the growth of a polysilicon gate layer, followed by depositing a flat oxide layer, oxidizing the polysilicon gate to form a silicon oxide interlayer, and then removing the oxide layer and interlayer to achieve a flat surface, utilizing thermal oxidation and wet cleaning to ensure uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the polysilicon gate surface is left uneven, then the manufacturing process is simpler, but subsequent processes such as SiGe epitaxial growth are affected by thickness non-uniformity
Solution Approach 1:
The patent introduces an intermediary element - the planarization oxide layer - that mediates between the uneven substrate and the polysilicon gate formation. This intermediate oxide layer acts as a buffer that compensates for substrate height differences, enabling the polysilicon gate to form with uniform thickness without requiring complex in-situ planarization methods during gate fabrication.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively planarizes the polysilicon gate surface, eliminating protuberances and ensuring uniform thickness, thereby avoiding subsequent process issues and improving the quality of integrated circuit products.
Implementation Method 1
the oxide layer with a flat surface is formed by flowably chemical vapor deposition
Implementation Method 2
the oxide layer with a flat surface is formed by spin coating
Implementation Method 3
the polysilicon gate layer is oxidized by thermal oxidation
Data Source
AI summary
A method of planarizing a polysilicon gate are provided, comprising: growing a polysilicon gate layer on a substrate with trenches; depositing an oxide layer on the polysilicon gate layer; oxidizing the top portion of the polysilicon gate layer from the flat surface of the oxide layer, so as to form a silicon oxide interlayer in the top portion of the polysilicon gate layer; the bottom of the silicon oxide interlayer is aligned with or lower than the low-lying areas of surface of the polysilicon gate layer; removing the oxide layer and the silicon oxide interlayer, so as to obtain a flat surface of the polysilicon gate layer and avoid a series of problems resulted from the uneven surface in the subsequent processes.