Polysilicon Gate Reentrant Formation via Tensile Stress Film
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Solution Overview
Problem
Current semiconductor manufacturing processes lack a method to effectively control the production of polysilicon gates with reentrants, leading to increased gate-to-LDD overlap capacitance and reduced gate oxide reliability due to high energy implant penetration.
Innovation Solution
A method involving the deposition of a tensile stress film on a substrate before etching the polysilicon layer to form a polysilicon gate with reentrants, using nitride films like titanium nitride, phosphorus nitride, or aluminium nitride, which generates tensile stress and allows for the formation of polysilicon gates with reentrants during the etching process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a polysilicon gate with foot is formed, then the gate source/drain overlap capacitance increases, but the gate oxide reliability deteriorates due to high energy implant penetration
Solution Approach 1:
A tensile stress film is deposited on the substrate before forming the polysilicon gate structure. This preliminary action modifies the substrate stress state to control the etching process, enabling the formation of reentrant gates that reduce overlap capacitance while preventing harmful implant penetration through the gate oxide.
Solution Approach 2:
The invention changes the stress parameter of the substrate by depositing a tensile stress film. This parameter change affects the etching behavior of the polysilicon layer, enabling precise control over the gate bottom morphology to achieve reentrant structures with improved electrical characteristics and reliability.
2Ease of manufacture
If no process is used to control polysilicon gate formation, then the manufacturing process is simple, but reentrant gates cannot be formed effectively
Solution Approach 1:
The tensile stress film is deposited as a preliminary step before polysilicon gate formation. This single additional process step enables precise control over the gate shape during etching, achieving reentrant structures that would otherwise require complex multi-step processes or advanced lithography techniques.
Solution Approach 2:
By changing the substrate stress parameter through film deposition, the invention achieves precise control over polysilicon gate morphology. This approach transforms a difficult patterning problem into a controllable stress-mediated self-organization process during etching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved semiconductor device performance by reducing gate-source/drain overlap capacitance and enhancing Time-Dependent Dielectric Breakdown (TDDB) parameters, leading to better gate oxide reliability.
Implementation Method 1
depositing a tensile stress film on a second surface of the substrate before etching the polysilicon layer
Implementation Method 2
The tensile stress film is a nitride film with a tensile stress
Data Source
AI summary
A method of manufacturing semiconductor device and a wafer are provided in accordance with embodiments of the present invention, which relates to semiconductor technology. The method includes: providing a substrate, and forming a gate oxide layer and a polysilicon layer on a first surface of the substrate; etching the polysilicon layer by use of a patterned mask so as to form a polysilicon gate with reentrants; depositing a tensile stress film on a second surface of the substrate before etching the polysilicon layer. The tensile stress film can be deposited on the second surface of the substrate for generating the tensile stress for the wafer. Thus, a polysilicon gate with reentrants can be formed in etching process. In this way, semiconductor devices can have smaller gate-source/drain overlap capacitance and better TDDB parameters, and the performance of the devices can be improved.