Polysilicon Germanium Gate Electrode with Diffusion Barrier
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The reduction in transistor scaling leads to issues with gate depletion and dopant penetration in MOSFETs, causing performance degradation due to inhomogeneous doping and increased sensitivity of thin gate dielectric layers, which existing polysilicon germanium gate electrodes fail to completely resolve.
Innovation Solution
A method of forming a polysilicon germanium gate electrode with a diffusion-blocking layer made of silicon, germanium, and carbon, which prevents dopant penetration into the gate dielectric and allows in-situ doping to prevent depletion effects, featuring a higher germanium content in the blocking layer and tailored germanium profiles for work function engineering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If doped polysilicon is used as gate material, then the gate electrode can be formed with standard processes, but gate depletion occurs due to semiconductive properties causing performance degradation
Solution Approach 1:
The gate electrode is divided into multiple functional layers: an undoped polysilicon germanium layer serves as the main gate material, while separately deposited doped polysilicon layers are added to compensate for depletion effects. This segmentation allows each layer to perform its specific function without compromising the other.
Solution Approach 2:
The gate electrode structure combines undoped polysilicon germanium with doped polysilicon layers to create a composite material system. The undoped region provides low depletion, while the doped regions provide carrier injection, achieving both low depletion and ease of manufacture.
2Ease of manufacture
If ion implantation and thermal anneal are used for doping, then the gate electrode can be doped, but inhomogeneous doping occurs from top to bottom
Solution Approach 1:
The gate electrode is first formed with the desired undoped or uniformly doped structure, and then additional doped polysilicon layers are deposited on specific surfaces. This preliminary formation followed by selective doping ensures uniform base structure with controlled doping gradients.
Solution Approach 2:
The undoped polysilicon germanium layer acts as an intermediary between the substrate and the doped polysilicon layers. It provides a uniform base that prevents direct interaction between the ion implantation process and the underlying structures, ensuring homogeneous doping.
3Productivity
If gate insulator thickness is reduced for scaling, then device density increases, but dopant penetration through the thin gate dielectric increases causing performance degradation
Solution Approach 1:
The patent converts the harmful effect of dopant penetration into a beneficial feature by using controlled dopant diffusion through the gate electrode to create desired doping profiles in the channel region. The doped polysilicon layers serve as dopant sources that beneficially dope the channel while the undoped germanium-rich layers block excessive diffusion into the gate dielectric.
Solution Approach 2:
Different regions of the gate electrode are assigned different doping levels and germanium concentrations: the interface regions have higher doping to prevent depletion and control threshold voltage, while the central region has lower doping and higher germanium content to minimize depletion and block dopant penetration into the gate dielectric.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively minimizes gate depletion and dopant penetration, enhancing transistor performance by maintaining uniform dopant distribution and reducing sub-threshold leakage, allowing for improved threshold voltage control and increased current amplification.
Implementation Method 1
a diffusion-blocking layer made substantially of silicon and germanium... prevents dopant penetration into or across the gate dielectric
Implementation Method 2
in-situ doping of select portions of the gate stack with various n-type and p-type impurities
Implementation Method 3
The small thickness of the seed layer also enables effective Ge diffusion into the Si seed layer during subsequent deposition and/or subsequent thermal operations
Implementation Method 4
the polysilicon tends to experience formation of a depletion region adjacent to the interface between a gate electrode and a gate insulator when a voltage is applied
Data Source
AI summary
A method of fabricating a semiconductive film stack for use as a polysilicon germanium gate electrode to address problems associated with implant and diffusion of dopants. Achieving a sufficiently high active dopant concentration at a gate-dielectric interface while avoiding gate penetration of dopants such as boron is problematic. A higher gate implant dosage or annealing temperature is needed, and boron penetration through the thin gate oxide is inevitably enhanced. Both problems are exacerbated as the gate dielectric becomes thinner. In order to achieve a high level of active dopant concentration next to the gate dielectric without experiencing problems associated with gate depletion and penetration, a method and procedures of applying a diffusion-blocking layer is described with respect to an exemplary MOSFET application. However, a diffusion-blocking concept is also presented, which is readily amenable to a variety of semiconductor related technologies.


