Polycrystalline Silicon Layer Uniform Grain Boundary Control
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Solution Overview
Problem
Thin film transistors made from polycrystalline silicon layers using existing crystallization methods exhibit non-uniform characteristics due to irregular grain size and distribution of grain boundaries, leading to inconsistent threshold voltage and off-characteristics.
Innovation Solution
The method involves forming a seed region with a width of at least 3.5 micrometers using the super grain silicon (SGS) technique, which spreads crystallinity to form a semiconductor layer with uniform grain size and regular grain boundary distribution, enhancing the characteristics of the polycrystalline silicon layer for use in flat panel displays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional crystallization methods (SPC, ELC, MIC, MILC) are used to form polycrystalline silicon layers, then the amorphous silicon layer can be crystallized into a polycrystalline structure, but the resulting thin film transistors exhibit non-uniform characteristics due to irregular grain size and distribution of grain boundaries
Solution Approach 1:
The crystallization process is divided into two distinct stages: first forming a seed region with controlled grain structure, then allowing crystallization to propagate from this seed region. This segmentation of the crystallization process enables better control over the final grain size and distribution, resolving the non-uniformity problem of conventional single-stage methods.
Solution Approach 2:
A seed region is formed in advance before the main crystallization process. This seed region serves as a template that pre-establishes the desired grain structure and boundaries, which then guide the subsequent crystallization of the remaining amorphous silicon layer, ensuring uniform characteristics throughout the polycrystalline silicon layer.
2Manufacturing precision
If the seed region width is increased to at least 3.5 micrometers to improve crystallization uniformity, then the grain size uniformity and grain boundary distribution improve, but the manufacturing process complexity increases due to additional patterning steps
Solution Approach 1:
Different regions of the silicon layer are given different properties: the seed region has a specific width (at least 3.5 micrometers) and crystalline structure that is deliberately different from the remaining amorphous silicon layer. This local differentiation in the seed region enables it to serve as an effective template for uniform crystallization propagation.
Solution Approach 2:
The seed region width is set to a specific parameter range (at least 3.5 micrometers) which has been optimized to achieve the best balance between crystallization control and process feasibility. This parameter optimization ensures sufficient grain structure control while maintaining reasonable manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a polycrystalline silicon layer with improved uniformity and regular grain boundary distribution, leading to enhanced performance and consistency in thin film transistors and flat panel displays.
Implementation Method 1
crystallizing a region of the amorphous silicon layer to form a seed region in the amorphous silicon layer... and spreading crystallinity of the seed region beyond the exposed portion of the amorphous silicon layer
Data Source
AI summary
A polycrystalline silicon layer, a flat panel display using the polycrystalline silicon layer, and a method of fabricating the same are provided. The polycrystalline silicon layer is formed by crystallizing a seed region of an amorphous silicon layer using a super grain silicon (SGS) crystallization technique. The crystallinity of the seed region spread into a crystallization region beyond the seed region. The crystallization region is formed into a semiconductor layer that can be incorporated to make a thin film transistor to drive flat panel displays. The semiconductor layer made by the method of the present invention provides uniform growth of grain boundaries, and characteristics of a thin film transistor made of the semiconductor layer are improved.